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IDT71T75702 Datasheet(PDF) 14 Page - Integrated Device Technology

Part # IDT71T75702
Description  Synchronous ZBT SRAMs
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT71T75702 Datasheet(HTML) 14 Page - Integrated Device Technology

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6.42
14
IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with
2.5V I/O, Burst Counter and Flow-Through Outputs
Commercial and Industrial Temperature Ranges
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range (VDD = 2.5V±5%)
Figure 2. Lumped Capacitive Load, Typical Derating
Figure 1. AC Test Load
AC Test Load
AC Test Conditions
DC Electrical Characteristics Over the Operating
Temperature and Supply Voltage Range(1) (VDD = 2.5V±5%)
NOTE:
1. The
LBO, TMS, TDI, TCK and TRST pins will be internally pulled to VDD and the ZZ pin will be internally pulled to VSS if they are not actively driven in the application.
NOTES:
1. All values are maximum guaranteed values.
2. At f = fMAX, inputs are cycling at the maximum frequency of read cycles of 1/tCYC; f=0 means no input lines are changing.
3. For I/Os VHD = VDDQ – 0.2V, VLD = 0.2V. For other inputs VHD = VDD – 0.2V, VLD = 0.2V.
Symbol
Parameter
Test Conditions
Min.
Max.
Unit
|ILI|
Input Leakage Current
VDD = Max., VIN = 0V to VDD
___
5µ A
|ILI|
LBO, JTAG and ZZ Input Leakage Current(1)
VDD = Max., VIN = 0V to VDD
___
30
µ A
|ILO|
Output Leakage Current
VOUT = 0V to VCC
___
5µ A
VOL
Output Low Voltage
IOL = +6mA, VDD = Min.
___
0.4
V
VOH
Output High Voltage
IOH = -6mA, VDD = Min.
2.0
___
V
5319 tbl 21
Sym b ol
Param eter
Test Co nd itio ns
7.5n s
8ns
8.5n s
Unit
Co m 'l
Ind
Co m 'l
Ind
Co m 'l
Ind
IDD
Op e rating P o we r
S upply Cu rre nt
D e vice S e le cte d , O utp uts O p e n,
ADV/
LD = X, VDD = M ax.,
V IN > V IH or < V IL, f = fMA X(2)
275
295
250
270
225
245
mA
ISB1
C M O S Stand b y Po w e r
S upply Cu rre nt
D e vice De se le cte d , O utp uts O p e n ,
V DD = M a x ., V IN > V HD or < V LD,
f = 0(2,3)
40
60
40
60
40
60
mA
ISB2
C lo c k Running P o w e r
S upply Cu rre nt
D e vice De se le cte d , O utp uts O p e n ,
V DD = M a x ., V IN > V HD or < V LD,
f = fMA X(2,3)
105
125
100
120
95
115
mA
ISB3
Id le P o w e r
S upply Cu rre nt
D e vice S e le cte d , O utp uts O p e n,
CEN > VIH, VDD = M ax.,
V IN > V HD or < V LD, f = fMA X
(2,3)
60
80
60
80
60
80
mA
IZZ
Fu ll S le ep M o de
S upply Cu rre nt
D e vice S e le cte d , O utp uts O p e n,
CEN < VIH, VDD = M ax., ZZ > V HD
V IN > V HD or < V LD, f = fMA X(2,3)
40
60
40
60
40
60
mA
5319 tb l 2 2
Input Pulse Levels
Input Rise/Fall Times
Input Timing Reference Levels
Output Reference Levels
Output Load
0 to 2.5V
2ns
(VDDQ/2)
(VDDQ/2)
Figure 1
5319 tbl 23
1
2
3
4
20 30 50
100
200
∆tCD
(Typical, ns)
Capacitance (pF)
80
5
6
5319 drw 05
,
VDDQ/2
50
I/O
Z0 =50
5319 drw 04
,


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