IDT71T75702_09 datasheet(11/26 Pages) IDT

Part #	IDT71T75702

Description	Synchronous ZBT SRAMs

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Manufacturer	IDT [Integrated Device Technology]

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IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with

2.5V I/O, Burst Counter and Flow-Through Outputs

Commercial and Industrial Temperature Ranges

11

Read Operation(1)

Burst Write Operation(1)

Burst Read Operation(1)

Write Operation(1)

NOTES:

1. H = High; L = Low; X = Don’t Care; Z = High Impedance.

2.

CE2 timing transition is identical to CE1 signal. CE2 timing transition is identical but inverted to the CE1 and CE2 signals.

NOTES:

1. H = High; L = Low; X = Don’t Care; Z = High Impedance.

2.

CE2 timing transition is identical to CE1 signal. CE2 timing transition is identical but inverted to the CE1 and CE2 signals.

NOTES:

1. H = High; L = Low; X = Don’t Care; Z = High Impedance.

2.

CE2 timing transition is identical to CE1 signal. CE2 timing transition is identical but inverted to the CE1 and CE2 signals.

NOTES:

1. H = High; L = Low; X = Don’t Care; Z = High Impedance.

2.

CE2 timing transition is identical to CE1 signal. CE2 timing transition is identical but inverted to the CE1 and CE2 signals.

Cycle

Address

R/

W

ADV/

LD

CE1(2)

CEN

BWx

OE

I/O

Comments

nA0

H

L

X

Address and Control meet setup

n+1

X

XXX

L

Q0

Contents of Address A0 Read Out

5319 tbl 13

Cycle

Address

R/

W

ADV/

LD

CE1(2)

CEN

BWx

OE

I/O

Comments

nA0

H

L

X

Address and Control meet setup

n+1

X

H

XL

Q0

Address A0 Read Out, Inc. Count

n+2

X

H

XL

Q0+1

Address A0+1 Read Out, Inc. Count

n+3

X

H

XL

Q0+2

Address A0+2 Read Out, Inc. Count

n+4

X

H

XL

Q0+3

Address A0+3 Read Out, Load A1

n+5

A1

HL

L

X

L

Q0

Address A0 Read Out, Inc. Count

n+6

X

H

XL

Q1

Address A1 Read Out, Inc. Count

n+7

A2

HL

L

X

L

Q1+1

Address A1+1 Read Out, Load A2

5319 tbl 14

Cycle

Address

R/

W

ADV/

LD

CE1(2)

CEN

BWx

OE

I/O

Comments

nA0

L

X

Address and Control meet setup

n+1

X

L

X

D0

Write to Address A0

5319 tbl 15

Cycle

Address

R/

W

ADV/

LD

CE1(2)

CEN

BWx

OE

I/O

Comments

nA0

L

X

Address and Control meet setup

n+1

X

H

X

L

X

D0

Address A0 Write, Inc. Count

n+2

X

H

X

L

X

D0+1

Address A0+1 Write, Inc. Count

n+3

X

H

X

L

X

D0+2

Address A0+2 Write, Inc. Count

n+4

X

H

X

L

X

D0+3

Address A0+3 Write, Load A1

n+5

A1

L

LLL

X

D0

Address A0 Write, Inc. Count

n+6

X

H

X

L

X

D1

Address A1 Write, Inc. Count

n+7

A2

L

LLL

X

D1+1

Address A1+1 Write, Load A2

5319 tbl 16

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