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IDT71T75702 Datasheet(PDF) 10 Page - Integrated Device Technology |
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IDT71T75702 Datasheet(HTML) 10 Page - Integrated Device Technology |
10 / 26 page 6.42 10 IDT71T75702, IDT71T75902, 512K x 36, 1M x 18, 2.5V Synchronous ZBT™ SRAMs with 2.5V I/O, Burst Counter and Flow-Through Outputs Commercial and Industrial Temperature Ranges NOTES: 1. CE2 timing transition is identical to CE1 signal. CE2 timing transition is identical but inverted to the CE1 and CE2 signals. 2. H = High; L = Low; X = Don't Care; Z = High Impedence. Device Operation - Showing Mixed Load, Burst, Deselect and NOOP Cycles(2) Cycle Address R/ W ADV/ LD CE1(1) CEN BWx OE I/O Comments nA0 HL L L X X D1 Load read n+1 X X H XL XL Q0 Burst read n+2 A1 HL L L X L Q0+1 Load read n+3 X X L H L X L Q1 Deselect or STOP n+4 X X H X L X X Z NOOP n+5 A2 H L L L X X Z Load read n+6 X X H XL XL Q2 Burst read n+7 X X L H L X L Q2+1 Deselect or STOP n+8 A3 L L LLL X Z Load write n+9 X X H X L L X D3 Burst write n+10 A4 L L LLL X D3+1 Load write n+11 X X L H L X X D4 Deselect or STOP n+12 X X H X L X X Z NOOP n+13 A5 L L LLL X Z Load write n+14 A6 HL L L X X D5 Load read n+15 A7 L L LLLL Q6 Load write n+16 X X H X L L X D7 Burst write n+17 A8 HL L L X X D7+1 Load read n+18 X X H X L X L Q8 Burst read n+19 A9 L L LLLL Q8+1 Load write 5319 tbl 12 |
Similar Part No. - IDT71T75702_09 |
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Similar Description - IDT71T75702_09 |
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