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U4083B Datasheet(PDF) 2 Page - TEMIC Semiconductors |
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U4083B Datasheet(HTML) 2 Page - TEMIC Semiconductors |
2 / 11 page ![]() U4083B TELEFUNKEN Semiconductors Rev. A2, 07-Apr-97 Preliminary Information 2 (11) Pin Description 1 2 3 4 8 7 6 5 94 8022 V i FC1 FC2 GND CD VO1 VO2 V S Figure 2. Pinning Pin Symbol Function 1 CD Chip disable 2 FC2 Filtering, power supply rejection 3 FC1 Filtering, power supply rejection 4 Vi Amplifier input 5 VO1 Amplifier output 1 6 VS Voltage supply 7 GND Ground 8 VO2 Amplifier output 2 Functional Description Including External Circuitry Pin 1: Chip disable * digital input (CD) Pin 1 (chip disable) is used to power down the IC to con- serve power or muting or both. Input impedance at pin 1 is typically 90 k W. Logic 0 < 0.8 V IC enabled (normal operation) Logic 1 > 2 V IC disabled Figure 15 shows power supply current diagram. The change in differential gain from normal operation to muted operation (muting) is more than 70 dB. Switching characteristics are as follows: turn-on time ton = 12 to 15 ms turn-off time toff v 2 ms They are independent of C1, C2 and VS. Voltages at Pins 2 and 3 are supplied from VS and there- fore do not change when the U4083B is disabled. Outputs– VO1 (Pin 5) and VO2 (Pin 8) –turn to a high im- pedance condition by removing the signal from the speaker. When signals are applied from an external source to the outputs (disabled), they must not exceed the range be- tween the supply voltage, Vs, and Ground. Pins 2 and 3: Filtering, power supply rejection Power supply rejection is provided by capacitors C1 and C2 at Pin 3 and Pin 2, respectively. C1 is dominant at high frequencies whereas C2 is dominant at low frequencies (figures 4 to 7). Values of C1 and C2 depend on the conditions of each application. For example, a line powered speakerphone (telephone amplifier) will require more filtering than a system powered by regulated power supply. The amount of rejection is a function of the capacitors and the equivalent impedance looking into Pin 3 and Pin 2 (see electrical characteristic equivalent resistance, R). Apart from filtering, capacitors C1 and C2 also influence the turn-on time of the circuit at power-up since capaci- tors are charged up through the internal resistors (50 k W and 125 k W) as shown in the block diagram. Figure 1 shows turn-on time versus C2 at VS = 6 V, for two different C1 values. Turn-on time is 60% longer when VS = 3 V and 20% shorter when VS = 9 V. Turn-off time is less than 10 ms Pin 4: Amplifier input Vi Pin 5: Amplifier output 1 VO1 Pin 8: Amplifier output 2 VO2 There are two identical operational amplifiers. Amp.1 has an open loop gain w 80 dB at 100 Hz (figure 2), whereas the closed loop gain is set by external resistors, Rf and Ri (figure 3). The amplifier is unity gain stable, and has a unity gain frequency of approximately 1.5 MHz. A closed loop gain of 46 dB is recommended for a frequency range of 300 to 3400 Hz (voice band). Amp.2 is internally set to a gain of –1.0 (0 dB). The outputs of both amplifiers are capable of sourcing and sinking a peak current of 200 mA. Output voltage swing is between 0.4 V and Vs – 1.3 V at maximum current (figures 18 and 19). The output dc offset voltage between Pins 5 and 8 (VO1 – VO2) is mainly a function of the feedback resistor, Rf, because the input offset voltage of the two amplifiers generally neutralize each other. Bias current of Amp. 1 which is constant with respect to Vs, however flows out of Pin 4 (Vi) and through Rf, forcing V01 to shift negative by an amount equal to Rf IIB and VO2 positive to an equal amount. The output offset voltage specified in the electrical char- acteristics is measured with the feedback resistor (Rf = 75 k W) shown in typical application circuit. It takes into account bias current as well as internal offset voltages of the amplifiers. |
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