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IDT7035S Datasheet(PDF) 15 Page - Integrated Device Technology |
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IDT7035S Datasheet(HTML) 15 Page - Integrated Device Technology |
15 / 19 page ![]() 6.42 IDT7035S/L High-Speed 8K x 18 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 15 Functional Description TheIDT7035providestwoportswithseparatecontrol,addressand I/Opinsthatpermitindependentaccessforreadsorwritestoanylocation inmemory.TheIDT7035hasanautomaticpowerdownfeaturecontrolled by CE. The CE controls on-chip power down circuitry that permits the respectiveporttogointoastandbymodewhennotselected(CEHIGH). Whenaportisenabled,accesstotheentirememoryarrayispermitted. Interrupts Iftheuserchoosestheinterruptfunction,amemorylocation(mailbox or message center) is assigned to each port. The left port interrupt flag (INTL) is asserted when the right port writes to memory location 1FFE (HEX),whereawriteisdefinedastheCER=R/WR=VILperTruthTable III.Theleftportclearstheinterruptbyanaddresslocation1FFEaccess when CEL = OEL = VIL, R/WL is a "don't care". Likewise, the right port interruptflag(INTR)isassertedwhentheleftportwritestomemorylocation 1FFF(HEX)andtocleartheinterruptflag(INTR),therightportmustaccess the memory location 1FFF, The message (18 bits) at 1FFE or 1FFF is user-defined, since it is an addressable SRAM location. If the interrupt function is not used, address locations 1FFE and 1FFF are not used as mailboxes,butaspartoftherandomaccessmemory.RefertoTruthTable IIIfortheinterruptoperation. Truth Table V — Example of Semaphore Procurement Sequence(1,2,3) NOTES: 1. This table denotes a sequence of events for only one of the eight semaphores on the IDT7035. 2. There are eight semaphore flags written to via I/O0 and read from all I/0's. These eight semaphores are addressed by A0 - A2. 3. CE = VIH, SEM = VIL to access the semaphores. Refer to the Semaphore Read/Write Control Truth Table. Truth Table IV — Address BUSY Arbitration NOTES: 1. Pins BUSYL and BUSYR are both outputs when the part is configured as a master. BUSY are inputs when configured as a slave. BUSYx outputs on the IDT7035 are push pull, not open drain outputs. On slaves the BUSY asserted internally inhibits write. 2. "L" if the inputs to the opposite port were stable prior to the address and enable inputs of this port. "H" if the inputs to the opposite port became stable after the address and enable inputs of this port. If tAPS is not met, either BUSYL or BUSYR = LOW will result. BUSYL and BUSYR outputs cannot be LOW simultaneously. 3. Writes to the left port are internally ignored when BUSYL outputs are driving LOW regardless of actual logic level on the pin. Writes to the right port are internally ignored when BUSYR outputs are driving LOW regardless of actual logic level on the pin. Inputs Outputs Function CEL CER AOL-A12L AOR-A12R BUSYL(1) BUSYR(1) XX NO MATCH H H Normal HX MATCH H H Normal XH MATCH H H Normal L L MATCH (2) (2) Write Inhibit(3) 4088 tbl 17 Functions D0 - D17 Left D0 - D17 Right Status No Action 1 1 Semaphore free Left Port Writes "0" to Semaphore 0 1 Left port has semaphore token Right Port Writes "0" to Semaphore 0 1 No change. Right side has no write access to semaphore Left Port Writes "1" to Semaphore 1 0 Right port obtains semaphore token Left Port Writes "0" to Semaphore 1 0 No change. Left port has no write access to semaphore Right Port Writes "1" to Semaphore 0 1 Left port obtains semaphore token Left Port Writes "1" to Semaphore 1 1 Semaphore free Right Port Writes "0" to Semaphore 1 0 Right port has semaphore token Right Port Writes "1" to Semaphore 1 1 Semaphore free Left Port Writes "0" to Semaphore 0 1 Left port has semaphore token Left Port Writes "1" to Semaphore 1 1 Semaphore free 4088 tbl 18 |
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