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IDT7035S Datasheet(PDF) 12 Page - Integrated Device Technology |
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IDT7035S Datasheet(HTML) 12 Page - Integrated Device Technology |
12 / 19 page ![]() 6.42 IDT7035S/L High-Speed 8K x 18 Dual-Port Static RAM Industrial and Commercial Temperature Ranges 12 Timing Waveform of Write Port-to-Port Read and BUSY(2,5) (M/S = VIH)(4) Timing Waveform of Write with BUSY NOTES: 1. tWH must be met for both BUSY input (slave) output master. 2. BUSY is asserted on port "B" Blocking R/W"B", until BUSY"B" goes HIGH 3. tWB is only for the 'Slave' Version. NOTES: 1. To ensure that the earlier of the two ports wins. tAPS is ignored for M/S = VIL (slave). 2. CEL = CER = VIL. 3. OE = VIL for the reading port. 4. If M/S = VIL (SLAVE) then BUSY is an input BUSY"A" = VIL and BUSY"B" = "don't care." 5. All timing is the same for left and right ports. Port "A" may be either the left of right port. Port "B" is the opposite port from Port "A". 4088 drw 11 tDW tAPS ADDR"A" tWC DATAOUT "B" MATCH tWP R/ W"A" DATAIN "A" ADDR"B" tDH VALID (1) MATCH BUSY"B" tBDA VALID tBDD tDDD (3) tWDD tBAA 4088 drw 12 R/W"A" BUSY"B" tWP tWB R/W"B" tWH (1) (2) (3) , |
Similar Part No. - IDT7035S_15 |
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Similar Description - IDT7035S_15 |
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