6.42

IDT7035S/L

High-Speed 8K x 18 Dual-Port Static RAM

Industrial and Commercial Temperature Ranges

17

sharedresource.Theleftprocessorcantheneitherrepeatedlyrequest

that semaphore’s status or remove its request for that semaphore to

performanothertaskandoccasionallyattemptagaintogaincontrolofthe

tokenviathesetandtestsequence.Oncetherightsidehasrelinquished

thetoken,theleftsideshouldsucceedingainingcontrol.

ThesemaphoreflagsareactiveLOW.Atokenisrequestedbywriting

azerointoasemaphorelatchandisreleasedwhenthesamesidewrites

a one to that latch.

The eight semaphore flags reside within the IDT7035 in a separate

memoryspacefromtheDual-PortRAM.This addressspaceisaccessed

byplacingaLOWinputontheSEMpin(whichactsasachipselectforthe

semaphore flags) and using the other control pins (Address, OE, and

R/W) as they would be used in accessing a standard Static RAM. Each

of the flags has a unique address which can be accessed by either side

of the other address pins has any effect.

iswrittenintoanunusedsemaphorelocation,thatflagwillbesettoazero

on that side and a one on the other side (see Truth Table V). That

semaphorecannowonlybemodifiedbythesideshowingthezero.When

aoneiswrittenintothesamelocationfromthesameside,theflagwillbe

settoaoneforbothsides(unlessasemaphorerequestfromtheotherside

ispending)andthencanbewrittentobybothsides. Thefactthattheside

whichisabletowriteazerointoasemaphoresubsequentlylocksoutwrites

fromtheothersideiswhatmakessemaphoreflagsusefulininterprocessor

communications.(Athoroughdiscussionontheuseofthisfeaturefollows

shortly.) A zero written into the same location from the other side will be

storedinthesemaphorerequestlatchforthatsideuntilthesemaphoreis

freed by the first side.

Whenasemaphoreflagisread,itsvalueisspreadintoalldatabitsso

thataflagthatisaonereadsasaoneinalldatabitsandaflagcontaining

azeroreadsasallzeros.Thereadvalueislatchedintooneside’soutput

registerwhenthatside'ssemaphoreselect(SEM)andoutputenable(OE)

signalsgoactive.Thisservestodisallowthesemaphorefromchanging

stateinthemiddleofareadcycleduetoawritecyclefromtheotherside.

Becauseofthislatch,arepeatedreadofasemaphoreinatestloopmust

cause either signal (SEM or OE) to go inactive or the output will never

change.

AsequenceWRITE/READmustbeusedbythesemaphoreinorder

to guarantee that no system level contention will occur. A processor

requestsaccesstosharedresourcesbyattemptingtowriteazerointoa

semaphorelocation.Ifthesemaphoreisalreadyinuse,thesemaphore

requestlatchwillcontainazero,yetthesemaphoreflagwillappearasone,

a fact which the processor will verify by the subsequent read (see Truth

TableV).Asanexample,assumeaprocessorwritesazerototheleftport

at a free semaphore location. On a subsequent read, the processor will

verifythatithaswrittensuccessfullytothatlocationandwillassumecontrol

overtheresourceinquestion.Meanwhile,ifaprocessorontherightside

attempts to write a zero to the same semaphore flag it will fail, as will be

verifiedbythefactthataonewillbereadfromthatsemaphoreontheright

side during subsequent read. Had a sequence of READ/WRITE been

usedinstead,systemcontentionproblemscouldhaveoccurredduringthe

gap between the read and write cycles.

Itisimportanttonotethatafailedsemaphorerequestmustbefollowed

by either repeated reads or by writing a one into the same location. The

reasonforthisiseasilyunderstoodbylookingatthesimplelogicdiagram

ofthesemaphoreflaginFigure4.Twosemaphorerequestlatchesfeed

into a semaphore flag. Whichever latch is first to present a zero to the

semaphoreflagwillforceitssideofthesemaphoreflagLOWandtheother

side HIGH. This condition will continue until a one is written to the same

semaphorerequestlatch.Shouldtheotherside’ssemaphorerequestlatch

havebeenwrittentoazerointhemeantime,thesemaphoreflagwillflip

overtotheothersideassoonasaoneiswrittenintothefirstside’srequest

latch.Thesecondside’sflagwillnowstayLOWuntilitssemaphorerequest

latchiswrittentoaone.Fromthisitiseasytounderstandthat,ifasemaphore

is requested and the processor which requested it no longer needs the

resource, the entire system can hang up until a one is written into that

semaphorerequestlatch.

The critical case of semaphore timing is when both sides request a

single token by attempting to write a zero into it at the same time. The

semaphorelogicisspeciallydesignedtoresolvethisproblem.Ifsimulta-

neousrequestsaremade,thelogicguaranteesthatonlyonesidereceives

thetoken.Ifonesideisearlierthantheotherinmakingtherequest,thefirst

sidetomaketherequestwillreceivethetoken.Ifbothrequestsarriveat

the same time, the assignment will be arbitrarily made to one port or the

other.

One caution that should be noted when using semaphores is that

semaphoresalonedonotguaranteethataccesstoaresourceissecure.

Aswithanypowerfulprogrammingtechnique,ifsemaphoresaremisused

or misinterpreted, a software error can easily happen.

Initializationofthesemaphoresisnotautomaticandmustbehandled

viatheinitializationprogramatpower-up.Sinceanysemaphorerequest

flagwhichcontainsazeromustberesettoaone,allsemaphoresonboth

sidesshouldhaveaonewrittenintothematinitializationfrombothsides

to assure that they will be free when needed.

UsingSemaphores—SomeExamples

Perhapsthesimplestapplicationofsemaphoresistheirapplicationas

resourcemarkersfortheIDT7035’sDual-PortRAM.Saythe8Kx18RAM

was to be divided into two 4K x 18 blocks which were to be dedicated at

any one time to servicing either the left or right port. Semaphore 0 could

be used to indicate the side which would control the lower section of

memory,andSemaphore1couldbedefinedasthe indicatorfortheupper

sectionofmemory.

To take a resource, in this example the lower 4K of Dual-Port RAM,

the processor on the left port could write and then read a zero in to

Semaphore 0. If this task was successfully completed (a zero was read

back rather than a one), the left processor would assume control

of the lower 4K. Meanwhile the right processor was attempting to gain

control of the resource after the left processor, it would read back a one

inresponsetothezeroithadattemptedtowriteintoSemaphore0.Atthis

point,thesoftwarecouldchoosetotryandgaincontrolofthesecond4K

sectionbywriting,thenreadingazerointoSemaphore1.Ifitsucceeded

in gaining control, it would lock out the left side.

Once the left side was finished with its task, it would write a one to

Semaphore 0 and may then try to gain access to Semaphore 1. If

Semaphore1wasstilloccupiedbytherightside,theleftsidecouldundo

itssemaphorerequestandperformothertasksuntilitwasabletowrite,then

readazerointoSemaphore1.Iftherightprocessorperformsasimilartask

withSemaphore0,thisprotocolwouldallowthetwoprocessorstoswap

4K blocks of Dual-Port RAM with each other.