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ADUCM322I Datasheet(PDF) 3 Page - Analog Devices |
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ADUCM322I Datasheet(HTML) 3 Page - Analog Devices |
3 / 23 page Data Sheet ADuCM322i Rev. 0 | Page 3 of 23 GENERAL DESCRIPTION The ADuCM322i is a fully integrated, single package device that incorporates high performance analog peripherals together with digital peripherals controlled by an 80 MHz ARM® Cortex™-M3 processor and integral flash for code and data. The ADC on the ADuCM322i provides 12-bit, 1 MSPS data acquisition on up to 16 input balls. Additionally, chip temperature and supply voltages can be measured. The ADC input voltage range is 0 V to VREF. A sequencer is provided, which allows a user to select a set of ADC channels to measure in sequence without software involvement during the sequence. The sequence can optionally repeat automatically at a user selectable rate. Up to eight VDACs are provided with output ranges that are programmable to one of two voltage ranges. The ADuCM322i can be configured so that the digital and analog outputs retain their output voltages through a watchdog or software reset sequence. Thus, a product can remain functional even while the ADuCM322i is resetting itself. The ADuCM322i has a low power ARM Cortex-M3 processor and a 32-bit RISC machine that offers up to 100 MIPS peak performance. Also integrated on-chip are 2 × 128 kB Flash/EE memory blocks and 32 kB of SRAM. The flash comprises two separate 128 kB blocks supporting execution from one flash block and simultaneous writing/erasing of the other flash block. The ADuCM322i operates from an on-chip oscillator or a 16 MHz external crystal and a PLL at 80 MHz. This clock can optionally be divided down to reduce current consumption. Additional low power modes can be set via software. In normal operating mode, the ADuCM322i digital core consumes about 300 µA per MHz. The device includes an MDIO interface capable of operating at up to 4 MHz. The capability to simultaneously execute from one flash block and write/erase the other flash block makes the ADuCM322i ideal for 10G, 40G, and 100G optical applications. The nonerasable kernel code plus flags in user flash provide assistance by allowing user code to robustly switch between the two blocks of user flash code and data spaces. The ADuCM322i integrates a range of on-chip peripherals that can be configured under software control, as required in the application. These peripherals include 1 × UART, 2 × I2C, and 2 × SPI serial input/output communication controllers, GPIO, 32-element PLA, three general-purpose timers, plus a wake-up timer and system watchdog timer. A 16-bit PWM with seven output channels is also provided. GPIO balls on the device power up in high impedance input mode. In output mode, the software chooses between open- drain mode and push-pull mode. The pull-up resistors can be disabled and enabled in software. In GPIO output mode, the inputs can remain enabled to monitor the balls. The GPIO balls can also be programmed to handle digital or analog peripheral signals; in such cases, the ball characteristics are matched to the specific requirement. A large support ecosystem is available for the ARM Cortex-M3 processor to ease product development of the ADuCM322i. Access is via the ARM serial wire debug port (SW-DP). On- chip factory firmware supports in-circuit serial download via I2C. These features are incorporated into a QuickStart™ development system, supporting this precision analog microcontroller family. |
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