Data Sheet

ADuCM322i

Rev. 0 | Page 19 of 23

Pin No.

Mnemonic

Type1

Description

K11

ADC_REFP

AO/A

Decoupling Capacitor Connection for ADC Reference Buffer. Connect this ball

to a 4.7 µF capacitor to the ADC_REFN ball. ADC_REFP can be overdriven by

an external reference.

L1

DGND1

S

Digital Ground 1 for DVDD_1V8.

L2

DVDD_1V8

AO

1.8 V Digital Supply. A 470 nF capacitor to DGND1 must be connected to this

ball to stabilize the internal 1.8 V regulator that supplies flash memory and

the ARM Cortex-M3 processor.

L3

VDAC5

AO

Voltage DAC5 Output (VDAC5).

L4

VDAC2/P3.7/PLAO[29]

AO/I/O

Voltage DAC2 Output (VDAC2).

Digital Input/Output Port 3.7 (P3.7).

Output of PLA Element 29 (PLAO[29]).

L5

VDAC0/P5.3

AO/I/O

Voltage DAC0 Output (VDAC0).

Digital Input/Output Port 5.3 (P5.3).

L6

AVDD3

S

VDAC Supply (3.3 V).

L7

AGND3

S

Ground for AVDD3.

L8

AIN4

AI

Analog Input 4.

L9

AIN5

AI

Analog Input 5. AIN5 can be the negative input for the comparator.

L10

AIN8/P4.2

AI/I/O

Analog Input 8 (AIN8).

Digital Input/Output Port 4.2 (P4.2).

L11

ADC_REFN

AO/A

Decoupling Capacitor Connection for ADC Reference Buffer. Connect this ball

to AGND4.

1

RES and RES1 are reserved, S is supply, AI is analog input, I is digital input, I/O is input/output, AO is analog output, and O is digital output.