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ADUC845_847_848ANOMALY Datasheet(PDF) 1 Page - Analog Devices |
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ADUC845_847_848ANOMALY Datasheet(HTML) 1 Page - Analog Devices |
1 / 4 page ![]() MicroConverter® Multichannel 24-/16-Bit ADCs with Embedded 62 kB Flash and Single-Cycle MCU Anomaly Sheet for Silicon Rev. C ADuC845/ADuC847/ADuC848 Rev. B Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners. One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.326.8703 © 2004 Analog Devices, Inc. All rights reserved. This anomaly list represents the known bugs, anomalies, and workarounds for the ADuC845, ADuC847, and ADuC848 MicroConverter products. The anomalies listed apply to all ADuC845/ADuC847/ADuC848 packaged material branded as follows: First (CSP) / Second (PQFP) Line ADuC845 or ADuC847 or ADuC848 Third (CSP) / Fourth Line (PQFP) C20 Analog Devices, Inc. is committed, through future silicon revisions, to continuously improving silicon functionality. Analog Devices tries to ensure that these future silicon revisions remain compatible with your present software/systems implementing the recommended workarounds outlined here. ADuC845/ADuC847/ADuC848 SILICON REVISION HISTORY Silicon Revision Identifier Kernel Revision Identifier Chip Marking Silicon Status Anomaly Sheet No. of Reported Anomalies C 0 All silicon branded ADUC845BS or ADuC845BCP ADuC847BS or ADuC847BCP ADuC8484BS or ADuC848BCP Third/Fourth Line: C20 Release Rev. B 7 ANOMALIES 1. Interrupts During Reading/Writing to DATAFLASH/EE [er001] Background: There are 4 kB of DATAFLASH/EE that can be used for nonvolatile data storage. Issue: If an interrupt occurs during a DATAFLASH/EE read or write operation, code execution following the ISR may resume at a random program memory address. Workaround: Disable all interrupts prior to a read or write operation. This can be done by setting the EA bit to 0. Related Issues: None. 2. PWM Operation [er002] Background: The PWM output rate is determined by the PWMxH and PWMxL registers for the PWM0 and PWM1 outputs. Issue: Modifying RAM address 2EH causes the PWM timer to be reset. Workaround: For Assembly code: Do not use memory location 2EH. For C code: Assign a dummy variable to location 0x2E using the following code: idata unsigned int ui32Dummy[2] _at_ 0x2E; Related Issues: None. |
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