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STM32F439AI Datasheet(PDF) 194 Page - STMicroelectronics |
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STM32F439AI Datasheet(HTML) 194 Page - STMicroelectronics |
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194 / 240 page ![]() Electrical characteristics STM32F437xx and STM32F439xx 194/240 DocID024244 Rev 10 6.3.27 Camera interface (DCMI) timing specifications Unless otherwise specified, the parameters given in Table 106 for DCMI are derived from tests performed under the ambient temperature, fHCLK frequency and VDD supply voltage summarized in Table 17, with the following configuration: • DCMI_PIXCLK polarity: falling • DCMI_VSYNC and DCMI_HSYNC polarity: high • Data formats: 14 bits Figure 75. DCMI timing diagram Table 106. DCMI characteristics Symbol Parameter Min Max Unit Frequency ratio DCMI_PIXCLK/fHCLK -0.4 DCMI_PIXCLK Pixel clock input - 54 MHz DPixel Pixel clock input duty cycle 30 70 % tsu(DATA) Data input setup time 2 - ns th(DATA) Data input hold time 2.5 - tsu(HSYNC) tsu(VSYNC) DCMI_HSYNC/DCMI_VSYNC input setup time 0.5 - th(HSYNC) th(VSYNC) DCMI_HSYNC/DCMI_VSYNC input hold time 1 - |
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