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TMP411-Q1 Datasheet(PDF) 23 Page - Texas Instruments |
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TMP411-Q1 Datasheet(HTML) 23 Page - Texas Instruments |
23 / 33 page TMP411 SBOS383C − DECEMBER 2006 − REVISED MAY 2008 www.ti.com 23 LAYOUT CONSIDERATIONS Remote temperature sensing on the TMP411 measures very small voltages using very low currents; therefore, noise at the IC inputs must be minimized. Most applications using the TMP411 will have high digital content, with several clocks and logic level transitions creating a noisy environment. Layout should adhere to the following guidelines: 1. Place the TMP411 as close to the remote junction sensor as possible. 2. Route the D+ and D− traces next to each other and shield them from adjacent signals through the use of ground guard traces, as shown in Figure 19. If a multilayer PCB is used, bury these traces between ground or VDD planes to shield them from extrinsic noise sources. 5 mil PCB traces are recommended. 3. Minimize additional thermocouple junctions caused by copper-to-solder connections. If these junctions are used, make the same number and approximate locations of copper-to-solder connections in both the D+ and D− connections to cancel any thermocouple effects. 4. Use a 0.1 µF local bypass capacitor directly between the V+ and GND of the TMP411, as shown in Figure 20. Minimize filter capacitance between D+ and D− to 1000pF or less for optimum measurement performance. This capacitance includes any cable capacitance between the remote temperature sensor and TMP411. 5. If the connection between the remote temperature sensor and the TMP411 is less than 8 inches, use a twisted-wire pair connection. Beyond 8 inches, use a twisted, shielded pair with the shield grounded as close to the TMP411 as possible. Leave the remote sensor connection end of the shield wire open to avoid ground loops and 60Hz pickup. GND(1) D+(1) D −(1) GND(1) NOTE: (1) 5 mil traces with 5 mil spacing. Ground or V+ layer on bottom and/or top, if possible. Figure 19. Example Signal Traces 1 2 3 4 8 7 6 5 TMP411 0.1 µF Capacitor PCB Via PCB Via V+ GND Figure 20. Suggested Bypass Capacitor Placement |
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Similar Description - TMP411-Q1 |
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