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SC16C652 Datasheet(PDF) 6 Page - NXP Semiconductors |
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SC16C652 Datasheet(HTML) 6 Page - NXP Semiconductors |
6 / 41 page Philips Semiconductors SC16C652 Dual UART with 32 bytes of transmit and receive FIFOs Product data Rev. 04 — 20 June 2003 6 of 41 9397 750 11634 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. CTSA, CTSB 38, 23 I Clear to Send (Active-LOW). These inputs are associated with individual UART channels, A through B. A logic 0 on the CTS pin indicates the modem or data set is ready to accept transmit data from the SC16C652. Status can be tested by reading MSR[4]. This pin has no effect on the UART’s transmit or receive operation. DSRA, DSRB 39, 20 I Data Set Ready (Active-LOW). These inputs are associated with individual UART channels, A through B. A logic 0 on this pin indicates the modem or data set is powered-on and is ready for data exchange with the UART. This pin has no effect on the UART’s transmit or receive operation. DTRA, DTRB 34, 35 O Data Terminal Ready (Active-LOW). These outputs are associated with individual UART channels, A through B. A logic 0 on this pin indicates that the SC16C652 is powered-on and ready. This pin can be controlled via the modem control register. Writing a logic 1 to MCR[0] will set the DTR output to logic 0, enabling the modem. This pin will be a logic 1 after writing a logic 0 to MCR[0], or after a reset. This pin has no effect on the UART’s transmit or receive operation. RIA, RIB 41, 21 I Ring Indicator (Active-LOW). These inputs are associated with individual UART channels, A through B. A logic 0 on this pin indicates the modem has received a ringing signal from the telephone line. A logic 1 transition on this input pin will generate an interrupt. RTSA, RTSB 33, 22 O Request to Send (Active-LOW). These outputs are associated with individual UART channels, A through B. A logic 0 on the RTS pin indicates the transmitter has data ready and waiting to send. Writing a logic 1 in the modem control register MCR[1] will set this pin to a logic 0, indicating data is available. After a reset this pin will be set to a logic 1. This pin has no effect on the UART’s transmit or receive operation. RXA, RXB 5, 4 I Receive data A, B. These inputs are associated with individual serial channel data to the SC16C652 receive input circuits, A-B. The RX signal will be a logic 1 during reset, idle (no data), or when the transmitter is disabled. During the local loop-back mode, the RX input pin is disabled and TX data is connected to the UART RX input, internally. TXA, TXB 7, 8 O Transmit data A, B. These outputs are associated with individual serial transmit channel data from the SC16C652. The TX signal will be a logic 1 during reset, idle (no data), or when the transmitter is disabled. During the local loop-back mode, the TX output pin is disabled and TX data is internally connected to the UART RX input. Table 2: Pin description…continued Symbol Pin Type Description LQFP48 |
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