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CS8412 Datasheet(PDF) 29 Page - Cirrus Logic |
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CS8412 Datasheet(HTML) 29 Page - Cirrus Logic |
29 / 38 page CS8411 CS8412 DS61F1 29 PIN DESCRIPTIONS: CS8412 Power Supply Connections VD+ - Positive Digital Power, PIN 7. Positive supply for the digital section. Nominally +5 volts. VA+ - Positive Analog Power, PIN 22. Positive supply for the analog section. Nominally +5 volts. DGND - Digital Ground, PIN 8. Ground for the digital section. DGND should be connected to same ground as AGND. AGND - Analog Ground, PIN 21. Ground for the analog section. AGND should be connected to same ground as DGND. Audio Output Interface SCK - Serial Clock, PIN 12. Serial clock for SDATA pin which can be configured (via the M0, M1, M2, and M3 pins) as an input or output, and can sample data on the rising or falling edge. As an output, SCK will generate 32 clocks for every audio sample. As an input, 32 SCK periods per audio sample must be provided in all normal modes. 1 2 3 4 5 6 7 821 22 23 24 25 26 27 28 VALIDITY + ERROR FLAG CS e / FREQ REPORT 2 SERIAL OUTPUT DATA ERROR FLAG SERIAL PORT MODE SELECT 1 SERIAL PORT MODE SELECT 2 ANALOG POWER ANALOG GROUND DGND VD+ C0/E0 Ca/E1 Cb/E2 Cc/F0 Cd/F1 C 9 10 11 12 17 18 19 20 FILTER MASTER CLOCK SERIAL PORT MODE SELECT 2 SERIAL PORT MODE SELECT 3 SCK FSYNC RXN RXP 13 14 15 16 FREQ/CS SELECT CS BLOCK START U CS12/FCK VERF Ce/F2 SDATA ERF M1 M0 VA+ AGND FILT MCK M2 M3 SEL CBL DIGITAL GROUND DIGITAL POWER CS 0 / ERROR CONDITION 0 CS a / ERROR CONDITION 1 CS b / ERROR CONDITION 2 CS c / FREQ REPORT 0 CS d / FREQ REPORT 1 CHANNEL STATUS OUTPUT SERIAL DATA CLOCK FRAME SYNC RECEIVE NEGATIVE RECEIVE POSITIVE USER DATA OUTPUT CHANNEL SELECT / FCLOCK CS8412 |
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