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CS8412 Datasheet(PDF) 18 Page - Cirrus Logic |
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CS8412 Datasheet(HTML) 18 Page - Cirrus Logic |
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18 / 38 page  CS8411 CS8412 18 DS61F1 portant ones; whereas, the last 20 bytes are often not used (except for byte 23, CRC). FLAG1 and FLAG2 can be used to monitor this buffer as shown in Figure 13. FLAG1 is set high when CS byte 1, location 09H, is written and is tog- gled when every other byte is written. FLAG2 is set high after CS byte 23 is written and set low after CS byte 3, location 0BH, is written. FLAG2 deter- mines whether the channel status pointer is writing to the first four-byte section of the channel status buffer or the second four-byte section, while FLAG1 indicates which two bytes of the section are free to update. The auxiliary data buffer, locations 10H to 1FH, is written to in a cyclic manner similar to the other buffers. Four auxiliary data bits are received per audio sample (sub-frame) and, since the auxiliary data is four times larger than the user data, the aux- iliary data buffer on the CS8411 is four times larger allowing FLAG0 to be used to monitor both. Buffer Mode 2 In buffer mode 2, two 8-byte buffers are available to independently buffer each channel of channel status data. Both buffers are identical to the channel status buffer in mode 1 and are written to simulta- neously, with locations 08H to 0FH containing CS data for channel A and locations 10H to 17H con- taining CS data for channel B. Both CS buffers can be monitored using FLAG1 and FLAG2 as de- scribed in the BUFFER MODE 1 section. The two most significant bits in SR1 change defini- tion for buffer mode 2. These two bits, when set, in- dicate CRC errors for their respective channels. A CRC error occurs when the internal calculated CRC for channel status bytes 0 through 22 does not match channel status byte 23. CCHG, bit 5 in SR1, is set when any bit in the first four channel status bytes of either channel changes from one block to the next. Since channel status doesn’t change very often, this bit may be monitored rather than check- ing all the bits in the first four bytes. These bits are illustrated in 6. FLAG0 FLAG1 FLAG2 (384 Audio Samples) Block Left C.S. Ad. 01 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 0 1 C.S. Byte (Addresses are in Hex) (Expanded) FLAG0 Left C.S. Ad. User Address 08 0B 0C 0F 08 0F 0C 0F 0C 0F 0C 0F 0C 10 13 14 17 10 17 14 17 14 17 14 17 14 Right C.S. Ad. Right C.S. Ad. FLAG1 05 06 07 04 05 06 07 04 08 09 0A 0B 10 11 12 13 Figure 14. CS8411 Buffer Memory Write Sequence - MODE 2 |
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