NB7VPQ701M

www.onsemi.com

2

Figure 1. Logic Diagram of NB7VPQ701M

Figure 2. UQFN12 Package Pinout

(Top View)

Table 1. PIN DESCRIPTION

Pin

Number

Pin Name

Type

Description

1

VCC

Power

1.8 V power supply

2

GND

Power

Reference Ground

3

RX+

Differential

Input Pair

Differential input pair for 5 / 10 Gbps USB signals. Must be externally AC−coupled.

4

RX-

5

NC1

N/A

No connect – float pin

6

OS

CMOS Input

Sets output amplitude on the TX. 3−state input with integrated 250 k

W pull−up and

pull−down resistors. Defaults to Mid when left open.

7

EQ

CMOS Input

Sets equalizer gain on the RX. 3−state input with integrated 250 k

W pull−up and pull−down

resistors. Defaults to Mid when left open.

8

DE

CMOS Input

Sets the output de−emphasis. 3−state input with integrated 250 k

W pull−up and pull−down

resistors. Defaults to Mid when left open.

9

EN

CMOS Input

Chip enable input (active high), internal 550 k

W pull−up resistor. Low to power down.

10

NC2

N/A

No connect – float pin

11

TX-

Differential

Output Pair

Differential output for 5 / 10 Gbps USB signals. Must be externally AC−coupled.

12

TX+