Datasheet

Datasheet

23/36

BD81A24MUV-M/EFV-M

TSZ02201-0T3T0C600070-1-2

© 2016 ROHM Co., Ltd. All rights reserved.

2016.10.19 Rev.003

www.rohm.com

TSZ22111・15・001

8.

Phase Characteristics adjustment

Figure 25. COMP terminal Application Circuit Diagram

About Application Stability Condition

The stability in LED voltage feedback system is achieved when the following conditions are met.

(1) The phase delay when gain is 1(0dB) is below 150°C (or simply, phase margin >30°C).

(2) The frequency (Unity Gain Frequency) when gain is 1(0dB) is <1/10 of switching frequency.

One way to assure stability based on phase margin adjustment is setting the Phase-lead fz close to switching frequency. In

addition, the Phase-lag fp1 shall be decided based on COUT and Output impedance RL.

Respective formula shall be as follows.

Phase-lead

[

] = 1/(2

[Ω]

[ ])

Phase-lag

1[

] = 1/(2

[Ω]

[ ])

(Note) The output impedance calculated from

=

/

Good stability would be obtained when the fz is set between 1kHz to 10kHz.

It is important to keep in Mind that these are very loose guidelines, and adjustments may have to be made to ensure stability

in the actual circuitry. It is also important to note that stability characteristics can change greatly depending on factors such

as substrate layout and load conditions. Therefore, when designing for mass-production, stability should be thoroughly

investigated and confirmed in the actual physical design.

9.

Setting of Over Voltage Protection(OVP)

Over voltage protection (OVP) is set from the external resistance ROVP1 and ROVP2.

The setting described below will be important in the either boost, buck, buck-boost applications.

Figure 26. OVP Application Circuit

The OVP terminal detects the over voltage when at >2.0V (Typ) and stops the DC/DC switching. In addition, it detects the

open condition when OVP terminal is at >2.0V (Typ) and LED1 to 4 pin voltage is at <0.3V (Typ), and the circuit is latched to

OFF (Please refer to page 6, Protect Function). In preventing error in detection of OPEN, it is necessary that the resistor

divide voltage of the maximum value of output voltage shall be less than the MIN value of OPEN detection voltage. Please

set the ROVP1 and ROVP2 is such a way the formula shown below can be met.

(

)[ ] × {1[ ](

1[ ] +

2[ ])

⁄

} <

(

Vout: DC/DC Output Voltage

VOVPopen: OVP Pin Open Detection Voltage

(

)[ ] = 1.1 (

) + (3.2 + 0.3 ) × 8 = 29.1

Vout

LED1~4

A

Internal IC

COMP

RPC

CPC

ROVP2

ROVP1

OVP

Vout

Internal IC

2.0V/1.94V

1.0V/0.57V