Datasheet

Datasheet

18/36

BD81A24MUV-M/EFV-M

TSZ02201-0T3T0C600070-1-2

© 2016 ROHM Co., Ltd. All rights reserved.

2016.10.19 Rev.003

www.rohm.com

TSZ22111・15・001

PCB Application Circuit

Figure 23. PCB Application Circuit

・

Please arrange RRT resistor closest to RT pin and do not attach capacitor.

・

Please arrange RISET resistor closest to ISET pin and do not attach capacitor.

・

Please attach the decoupling capacitor of CIN and CREG to IC pin as close as possible.

・

Because there is possibility that big current may flow into DGND and PGND, please make the impedance low.

・

In pins of ISET, RT and COMP, please pay attention so that noise will not get in.

・

Since PWM, OUTH, OUTL, SW, SYNC and LED 1-4 are switching, please pay attention so that it will not affect

the surrounding pattern.

・

There is a heat dissipation PAD at the back of package. Please solder the board for the heat dissipation PAD.

・

Please set the gate resistor of step-down FET (M1) to 0Ω. If resistor is connected, M1 OFF timing is delayed in M1 parasitic

capacity and gate resistor, and the penetrating current flows to the internal transistor of M1 and SW. OCP may be detected

by penetrating current.

・

To reduce noise, please consider the board layout in the shortest MIN impedance for Boost loop

(D2→COUT→DGND→OUTL→D2) and Buck loop (VCC→RCS→M1→D1→DGND→GND→CIN→VCC).

.

CS

EN

VREG

BOOT

OUTH

SW

VDISC

DGND

OUTL

PGND

ISET

OVP

LED4

LED3

VCC

SS

COMP

RT

SYNC

SHDETEN

GND

PWM

FAIL1

FAIL2

LEDEN1

LEDEN2

LED1

LED2

GND

1

2

3

4

5

6

7

8

9

10

11

12

13

14

28

27

26

25

24

23

22

21

20

19

18

17

16

15

VCC

VREG

RFL1

RFL2

SYNC

SHDETEN

PWM

FAIL1

FAIL2

RCS3

EN

RBOOT

VREG

VREG

M1

D1

L1

D2

LED4

LED3

LED2

LED1

BD81A44EFV

U1

LEDEN1

LEDEN2

VOUT