Data Sheet

©2009-2013 Exar Corporation

8/11

Rev 1C

The CDK3405 may also be operated with a single 75Ω

terminating resistor. To lower the output voltage swing

to the desired range, the nominal value of the resistor on

Current source outputs can drive VESA VSIS, and RS-

343A/SMPTE-170M compatible levels into doubly-termi-

nated 75Ω lines. Sync pulses can be added to the green

Full-scale output current of each D/A converter is deter-

mined by the value of the resistor connected between

D/A full-scale (white) current may also be calculated from:

to full-scale voltage.

Voltage Reference

ternal bandgap reference or an external voltage reference

mirrored to each of the GBR output current sources. To

minimize noise, a 0.1μF capacitor should be connected

pin. An external +1.25V reference may be applied to over-

a 0.1µF ceramic capacitor is required.

Power and Ground

Required power is a single +3.3V supply. To minimize power

supply induced noise, analog +3.3V should be connected

to all three supply pins with 0.1µF and 0.01µF decoupling

The high slew-rate of digital data makes capacitive cou-

pling to the outputs of any D/A converter a potential

problem. Since the digital signals contain high-frequency

components of the CLK signal, as well as the video out-

put signal, the resulting data feedthrough often looks

like harmonic distortion or reduced signal-to-noise perfor-

mance. All ground pins should be connected to a common

solid ground plane for best performance.