Electronic Components Datasheet Search
  English  ▼
ALLDATASHEET.COM

X  

AK5384 Datasheet(PDF) 15 Page - Asahi Kasei Microsystems

Part # AK5384
Description  107 DB 24 BIT 96KHZ 4 CHANNEL ADC
Download  21 Pages
Scroll/Zoom Zoom In 100%  Zoom Out
Manufacturer  AKM [Asahi Kasei Microsystems]
Direct Link  http://www.akm.com
Logo AKM - Asahi Kasei Microsystems

AK5384 Datasheet(HTML) 15 Page - Asahi Kasei Microsystems

Back Button AK5384 Datasheet HTML 11Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 12Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 13Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 14Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 15Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 16Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 17Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 18Page - Asahi Kasei Microsystems AK5384 Datasheet HTML 19Page - Asahi Kasei Microsystems Next Button
Zoom Inzoom in Zoom Outzoom out
 15 / 21 page
background image
ASAHI KASEI
[AK5384]
MS0225-E-00
2003/05
- 15 -
n Digital High Pass Filter
The ADC has a digital high pass filter for DC offset cancellation. The cut-off frequency of the HPF is 1.0Hz(@fs=48kHz)
and scales with sampling rate (fs).
n Overflow Detection
The AK5384 has overflow detect function for analog input. OVF pin goes to “H” if one of 4-channels overflows (more
than
−0.3dBFS). OVF output for overflowed analog input has the same group delay as ADC
(GD=27.6/fs=575µs@fs=48kHz). OVF is “L” for 516/fs (=10.75ms@fs=48kHz) after PDN pin = “
↑”, and then overflow
detection is enabled.
n Power down
The AK5384 is placed in the power-down mode by bringing PDN pin “L” and the digital filter is also reset at the same
time. This reset should always be done after power-up. In the power-down mode, the VCOM are AVSS level. An analog
initialization cycle starts after exiting the power-down mode. Therefore, the output data SDTO1/2 becomes available after
516 cycles of LRCK clock. During initialization, the ADC digital data outputs of both channels are forced to a 2’s
complement “0”. The ADC outputs settle in the data corresponding to the input signals after the end of initialization
(Settling approximately takes the group delay time).
Normal Operation
Internal
State
PDN
Power-down
Initialize
Normal Operation
516/fs(10.75ms@fs=48kHz)
Idle Noise
GD
GD
“0”data
A/D In
(Analog)
A/D Out
(Digital)
Clock In
MCLK,LRCK,BICK
(1)
(2)
(3)
“0”data
Idle Noise
Notes:
(1) Digital output corresponding to analog input has the group delay (GD).
(2) ADC output is “0” data at the power-down state.
(3) When the external clocks (MCLK, BICK, LRCK) are stopped, the AK5384 should be in the power-down state.
Figure 7. Power-down/up sequence example
n System Reset
The AK5384 should be reset once by bringing PDN pin “L” after power-up. The internal timing starts clocking by the
rising edge (falling edge at I
2S mode) of LRCK upon exiting from reset.


Similar Part No. - AK5384

ManufacturerPart #DatasheetDescription
logo
Asahi Kasei Microsystem...
AK5384 AKM-AK5384 Datasheet
269Kb / 23P
   24bit 96kHz 4ch A/D converter
More results

Similar Description - AK5384

ManufacturerPart #DatasheetDescription
logo
Asahi Kasei Microsystem...
AK5720 AKM-AK5720 Datasheet
823Kb / 25P
   96kHz 24-Bit ADC
AK5358A AKM-AK5358A Datasheet
268Kb / 18P
   96kHz 24-Bit ?誇 ADC
AK5358 AKM-AK5358 Datasheet
128Kb / 17P
   96kHz 24-Bit ?誇 ADC
AK5358A AKM-AK5358A_08 Datasheet
333Kb / 18P
   96kHz 24-Bit ?誇 ADC
AK5358B AKM-AK5358B Datasheet
187Kb / 19P
   96kHz 24-Bit ?誇 ADC
logo
Wolfson Microelectronic...
WM8775 WOLFSON-WM8775_06 Datasheet
395Kb / 39P
   24-bit, 96kHz ADC with 4 Channel I/P Multiplexer
logo
Asahi Kasei Microsystem...
AK5720VT AKM-AK5720VT Datasheet
823Kb / 25P
   96kHz 24-Bit ?꾬걪 ADC
logo
Cirrus Logic
WM8775 CIRRUS-WM8775 Datasheet
350Kb / 39P
   24-bit, 96kHz ADC with 4 Channel I/P Multiplexer
logo
Asahi Kasei Microsystem...
AK5393VS AKM-AK5393VS Datasheet
132Kb / 18P
   Enhanced Dual Bit DS 96kHz 24-Bit ADC
logo
Wolfson Microelectronic...
WM8773 WOLFSON-WM8773 Datasheet
213Kb / 29P
   24-bit, 96kHz ADC with 8 Channel I/P Multiplexer
More results


Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21


Datasheet Download

Go To PDF Page


Link URL




Privacy Policy
ALLDATASHEET.COM
Does ALLDATASHEET help your business so far?  [ DONATE ] 

About Alldatasheet   |   Advertisement   |   Datasheet Upload   |   Contact us   |   Privacy Policy   |   Link Exchange   |   Manufacturer List
All Rights Reserved©Alldatasheet.com


Mirror Sites
English : Alldatasheet.com  |   English : Alldatasheet.net  |   Chinese : Alldatasheetcn.com  |   German : Alldatasheetde.com  |   Japanese : Alldatasheet.jp
Russian : Alldatasheetru.com  |   Korean : Alldatasheet.co.kr  |   Spanish : Alldatasheet.es  |   French : Alldatasheet.fr  |   Italian : Alldatasheetit.com
Portuguese : Alldatasheetpt.com  |   Polish : Alldatasheet.pl  |   Vietnamese : Alldatasheet.vn
Indian : Alldatasheet.in  |   Mexican : Alldatasheet.com.mx  |   British : Alldatasheet.co.uk  |   New Zealand : Alldatasheet.co.nz
Family Site : ic2ic.com  |   icmetro.com