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AK5384 Datasheet(PDF) 14 Page - Asahi Kasei Microsystems |
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AK5384 Datasheet(HTML) 14 Page - Asahi Kasei Microsystems |
14 / 21 page ![]() ASAHI KASEI [AK5384] MS0225-E-00 2003/05 - 14 - LRCK (Mode5) BICK (256fs) SDTO1 23 0 L1 32 BICK 256 BICK 23 0 R1 32 BICK 23 23 0 L2 32 BICK 23 0 R2 32 BICK LRCK (Mode 7) Figure 4. Mode 5, 7 Timing (TDM256 mode, I 2S Compatible) LRCK (Mode 8) BICK (128fs) 128 BICK L1 32 BICK R1 32 BICK L2 32 BICK R2 32 BICK SDTO1 22 0 22 0 22 0 22 0 23 23 23 23 22 23 LRCK (Mode 10) Figure 5. Mode 8, 10 Timing (TDM128 mode, MSB justified) LRCK (Mode 9) BICK (128fs) 128 BICK L1 32 BICK R1 32 BICK L2 32 BICK R2 32 BICK SDTO1 22 0 22 0 22 0 22 0 23 23 23 23 23 LRCK (Mode 11) Figure 6. Mode 9, 11 Timing (TDM128 mode, I 2S Compatible) n Master Mode and Slave Mode The M/S pin selects either master or slave mode. M/S pin = “H” selects master mode and “L” selects slave mode. The AK5384 outputs BICK and LRCK in master mode. In slave mode, MCLK, BICK and LRCK are input externally. M/S pin Mode BICK, LRCK L Slave Mode BICK = Input LRCK = Input H Master Mode BICK = Output LRCK = Output Table 4. Master mode/Slave mode |
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