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AD5546 Datasheet(PDF) 3 Page - Analog Devices |
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AD5546 Datasheet(HTML) 3 Page - Analog Devices |
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3 / 16 page  AD5546/AD5556 Rev. 0 | Page 3 of 16 SPECIFICATIONS Table 1. Electrical Characteristics. VDD = 2.7 V to 5.5 V, IOUT = virtual GND, GND = 0 V, VREF = –10 V to 10 V, TA = full operating temperature range, unless otherwise noted. Parameter Symbol Conditions Min Typ Max Unit STATIC PERFORMANCE1 Resolution N AD5546, 1 LSB = VREF/216 = 153 µV at VREF = 10 V 16 Bits Resolution N AD5556, 1 LSB = VREF/214 = 610 µV at VREF = 10 V 14 Bits Relative Accuracy INL Grade: AD5556C ±1 LSB Relative Accuracy INL Grade: AD5546B ±2 LSB Differential Nonlinearity DNL Monotonic ±1 LSB Output Leakage Current IOUT Data = zero scale, TA = 25°C 10 nA Output Leakage Current IOUT Data = zero scale, TA = TA maximum 20 nA Full-Scale Gain Error GFSE Data = full scale ±1 ±4 mV Bipolar Mode Gain Error GE Data = full scale ±1 ±4 mV Bipolar Mode Zero-Scale Error GZSE Data = full scale ±1 ±2.5 mV Full-Scale Tempco 2 TCVFS 1 ppm/°C REFERENCE INPUT VREF Range VREF –18 +18 V REF Input Resistance REF 4 5 6 kΩ R1 and R2 Resistance R1 and R2 4 5 6 kΩ R1-to-R2 Mismatch ∆(R1 to R2) ±0.5 ±1.5 Ω Feedback and Offset Resistance RFB, ROFS 8 10 12 kΩ Input Capacitance2 CREF 5 pF ANALOG OUTPUT Output Current IOUT Data = full scale 2 mA Output Capacitance 2 COUT Code dependent 200 pF LOGIC INPUT AND OUTPUT Logic Input Low Voltage VIL VDD = 5 V 0.8 V Logic Input Low Voltage VIL VDD = 3 V 0.4 V Logic Input High Voltage VIH VDD = 5 V 2.4 V Logic Input High Voltage VIH VDD = 3 V 2.1 V Input Leakage Current IIL 10 µA Input Capacitance 2 CIL 10 pF INTERFACE TIMING 2 , 3 Data to WR Setup Time tDS VDD = 5 V 20 ns VDD = 3 V 35 ns Data to WR Hold Time tDH VDD = 5 V 0 ns VDD = 3 V 0 ns WR Pulse Width t WR VDD = 5 V 20 ns VDD = 3 V 35 ns LDAC Pulse Width tLDAC VDD = 5 V 20 ns VDD = 3 V 35 ns RS Pulse Width tRS VDD = 5 V 20 ns VDD = 3 V 35 ns WR to LDAC Delay Time tLWD VDD = 5 V 0 ns VDD = 3 V 0 ns |
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