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SC16C2550 Datasheet(PDF) 28 Page - NXP Semiconductors |
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SC16C2550 Datasheet(HTML) 28 Page - NXP Semiconductors |
28 / 46 page ![]() Philips Semiconductors SC16C2550 Dual UART with 16 bytes of transmit and receive FIFOs and IrDA encoder/decoder Product data Rev. 03 — 19 June 2003 28 of 46 9397 750 11621 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. [1] When using a software flow control the Xon/Xoff characters cannot be used for data transfer. 5 EFR[5] Special Character Detect. Logic 0 = Special character detect disabled (normal default condition). Logic 1 = Special character detect enabled. The SC16C2550 compares each incoming receive character with Xoff2 data. If a match exists, the received data will be transferred to FIFO and ISR[4] will be set to indicate detection of special character. Bit-0 in the X-registers corresponds with the LSB bit for the receive character. When this feature is enabled, the normal software flow control must be disabled (EFR[3-0] must be set to a logic 0). 4 EFR[4] Enhanced function control bit. The content of IER[7-4], ISR[5-4], FCR[5-4], and MCR[7-5] can be modified and latched. After modifying any bits in the enhanced registers, EFR[4] can be set to a logic 0 to latch the new values. This feature prevents existing software from altering or overwriting the SC16C2550 enhanced functions. Logic 0 = disable/latch enhanced features. IER[7-4], ISR[5-4], FCR[5-4], and MCR[7-5] are saved to retain the user settings, then IER[7-4] ISR[5-4], FCR[5-4], and MCR[7-5] are set to a logic 0 to be compatible with SC16C554 mode. (Normal default condition.) Logic 1 = Enables the enhanced functions. When this bit is set to a logic 1, all enhanced features of the SC16C2550 are enabled and user settings stored during a reset will be restored. 3-0 EFR[3-0] Cont-3-0 Tx, Rx control. Logic 0 or cleared is the default condition. Combinations of software flow control can be selected by programming these bits. See Table 21. Table 21: Software flow control functions[1] Cont-3 Cont-2 Cont-1 Cont-0 TX, RX software flow controls 0 0 X X No transmit flow control 1 0 X X Transmit Xon1/Xoff1 0 1 X X Transmit Xon2/Xoff2 1 1 X X Transmit Xon1 and Xon2/Xoff1 and Xoff2 X X 0 0 No receive flow control X X 1 0 Receiver compares Xon1/Xoff1 X X 0 1 Receiver compares Xon2/Xoff2 1 0 1 1 Transmit Xon1/Xoff1 Receiver compares Xon1 and Xon2, Xoff1 and Xoff2 0 1 1 1 Transmit Xon2/Xoff2 Receiver compares Xon1 and Xon2/Xoff1 and Xoff2 1 1 1 1 Transmit Xon1 and Xon2/Xoff1 and Xoff2 Receiver compares Xon1 and Xon2/Xoff1 and Xoff2 Table 20: Enhanced Feature Register bits description…continued Bit Symbol Description |
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