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SC16C2550 Datasheet(PDF) 21 Page - NXP Semiconductors |
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SC16C2550 Datasheet(HTML) 21 Page - NXP Semiconductors |
21 / 46 page ![]() Philips Semiconductors SC16C2550 Dual UART with 16 bytes of transmit and receive FIFOs and IrDA encoder/decoder Product data Rev. 03 — 19 June 2003 21 of 46 9397 750 11621 © Koninklijke Philips Electronics N.V. 2003. All rights reserved. 7.4 Interrupt Status Register (ISR) The SC16C2550 provides four levels of prioritized interrupts to minimize external software interaction. The Interrupt Status Register (ISR) provides the user with four interrupt status bits. Performing a read cycle on the ISR will provide the user with the highest pending interrupt level to be serviced. No other interrupts are acknowledged until the pending interrupt is serviced. A lower level interrupt may be seen after servicing the higher level interrupt and re-reading the interrupt status bits. Table 11 “Interrupt source” shows the data values (bits 0-3) for the four prioritized interrupt levels and the interrupt sources associated with each of these interrupt levels. 1 FCR[1] RCVR FIFO reset. Logic 0 = Receive FIFO not reset (normal default condition). Logic 1 = Clears the contents of the receive FIFO and resets the FIFO counter logic (the receive shift register is not cleared or altered). This bit will return to a logic 0 after clearing the FIFO. 0 FCR[0] FIFOs enabled. Logic 0 = Disable the transmit and receive FIFO (normal default condition). Logic 1 = Enable the transmit and receive FIFO. This bit must be a ‘1’ when other FCR bits are written to, or they will not be programmed. Table 10: RCVR trigger levels FCR[7] FCR[6] RX FIFO trigger level 0001 0104 1008 1114 Table 9: FIFO Control Register bits description…continued Bit Symbol Description Table 11: Interrupt source Priority level ISR[5] ISR[4] ISR[3] ISR[2] ISR[1] ISR[0] Source of the interrupt 1 0 00110LSR (Receiver Line Status Register) 2 0 00100 RXRDY (Received Data Ready) 2 0 01100 RXRDY (Receive Data time-out) 3 0 00010 TXRDY (Transmitter Holding Register Empty) 4 0 00000 MSR (Modem Status Register) 5 0 10000 RXRDY (Received Xoff signal) / Special character 6 1 00000CTS, RTS change of state |
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