SC16C2550 datasheet(17/46 Pages) PHILIPS

Part #	SC16C2550

Description	Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder/decoder

Download	46 Pages

Scroll/Zoom	100%

Manufacturer	PHILIPS [NXP Semiconductors]

Direct Link	http://www.nxp.com

Logo

17 / 46 page

Philips Semiconductors

SC16C2550

Dual UART with 16 bytes of transmit and receive FIFOs and IrDA

encoder/decoder

Product data

Rev. 03 — 19 June 2003

17 of 46

9397 750 11621

7.1 Transmit (THR) and Receive (RHR) Holding Registers

The serial transmitter section consists of an 8-bit Transmit Hold Register (THR) and

Transmit Shift Register (TSR). The status of the THR is provided in the Line Status

Register (LSR). Writing to the THR transfers the contents of the data bus (D7-D0) to

the TSR and UART via the THR, providing that the THR is empty. The THR empty

ﬂag in the LSR register will be set to a logic 1 when the transmitter is empty or when

data is transferred to the TSR. Note that a write operation can be performed when the

THR empty ﬂag is set (logic 0 = at least one byte in FIFO/THR, logic 1 = FIFO/THR

empty).

The serial receive section also contains an 8-bit Receive Holding Register (RHR) and

a Receive Serial Shift Register (RSR). Receive data is removed from the SC16C2550

and receive FIFO by reading the RHR register. The receive section provides a

mechanism to prevent false starts. On the falling edge of a start or false start bit, an

internal receiver counter starts counting clocks at the 16

× clock rate. After 7-1⁄2

clocks, the start bit time should be shifted to the center of the start bit. At this time the

start bit is sampled, and if it is still a logic 0 it is validated. Evaluating the start bit in

this manner prevents the receiver from assembling a false character. Receiver status

codes will be posted in the LSR.

7.2 Interrupt Enable Register (IER)

The Interrupt Enable Register (IER) masks the interrupts from receiver ready,

transmitter empty, line status and modem status registers. These interrupts would

normally be seen on the INTA, INTB output pins.

Table 8:

Interrupt Enable Register bits description

Bit

Symbol

Description

7

IER[7]

CTS interrupt.

Logic 0 = Disable the CTS interrupt (normal default condition).

Logic 1 = Enable the CTS interrupt. The SC16C2550 issues an

interrupt when the CTS pin transitions from a logic 0 to a logic 1.

6

IER[6]

RTS interrupt.

Logic 0 = Disable the RTS interrupt (normal default condition).

Logic 1 = Enable the RTS interrupt. The SC16C2550 issues an

interrupt when the RTS pin transitions from a logic 0 to a logic 1.

5

IER[5]

Xoff interrupt.

Logic 0 = Disable the software ﬂow control, receive Xoff interrupt

(normal default condition).

Logic 1 = Enable the software ﬂow control, receive Xoff interrupt.

4

IER[4]

Sleep mode.

Logic 0 = Disable sleep mode (normal default condition).

Logic 1 = Enable sleep mode.

3

IER[3]

Modem Status Interrupt. This interrupt will be issued whenever

there is a modem status change as reﬂected in MSR[0-3].

Logic 0 = Disable the modem status register interrupt (normal

default condition).

Logic 1 = Enable the modem status register interrupt.

Similar Part No. - SC16C2550

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	SC16C2550	603Kb / 46P	Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder/decoder Rev. 03-19 June 2003
	SC16C2550B	200Kb / 42P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 02-14 December 2004
	SC16C2550B	211Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 04-15 February 2007
	SC16C2550B	221Kb / 43P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 05-12 January 2009
	SC16C2550BIA44	200Kb / 42P	5 V, 3.3 V and 2.5 V dual UART, 5 Mbit/s (max.), with 16-byte FIFOs Rev. 02-14 December 2004

More results

Similar Description - SC16C2550

Manufacturer	Part #	Datasheet	Description
NXP Semiconductors	SC16C2550	603Kb / 46P	Dual UART with 16 bytes of transmit and receive FIFOs and infrared (IrDA) encoder/decoder Rev. 03-19 June 2003
Exar Corporation	ST16C580	244Kb / 41P	UART WITH 16-BYTE FIFO?셲 AND INFRARED (IrDA) ENCODER/DECODER
NXP Semiconductors	SC16C554	276Kb / 55P	Quad UART with 16-byte FIFO and infrared (IrDA) encoder/decoder Rev. 05-10 May 2004
NXP Semiconductors	SC16C652	575Kb / 41P	Dual UART with 32 bytes of transmit and receive FIFOs Rev. 04-20 June 2003
Exar Corporation	ST16C2550	443Kb / 34P	DUAL UART WITH 16-BYTE TRANSMIT AND RECEIVE FIFOS
NXP Semiconductors	SC16C2552	579Kb / 38P	Dual UART with 16-byte transmit and receive FIFOs Rev. 03-20 June 2003
Exar Corporation	ST16C580	212Kb / 39P	UART WITH 16-BYTE FIFO?셲 AND INFRARED (IrDA) ENCODER/DECODER
NXP Semiconductors	SC16IS752	303Kb / 59P	Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support Rev. 07-19 May 2008
	SC16IS740	555Kb / 63P	Single UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs Rev. 7-9 June 2011
	SC16IS752IBS	482Kb / 60P	Dual UART with I2C-bus/SPI interface, 64 bytes of transmit and receive FIFOs, IrDA SIR built-in support Rev. 9-22 March 2012

More results

SC16C2550 Datasheet(PDF) 17 Page - NXP Semiconductors

SC16C2550 Datasheet(HTML) 17 Page - NXP Semiconductors

Similar Part No. - SC16C2550

Similar Description - SC16C2550

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46

Datasheet Download

Link URL