STK5F1U3E3D-E

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5

Test Circuit

(The tested phase: U+ shows the upper side of the U phase and U

 shows the lower side of the U phase.)

 ICE / IR(BD)

U+

V+

W+

U-

V-

W-

M

42

42

42

34

30

26

N

34

30

26

38

38

38

U(BD)

V(BD)

W(BD)

M

1

4

7

N

20

20

20

 VCE(SAT) (Test by pulse)

U+

V+

W+

U-

V-

W-

M

42

42

42

34

30

26

N

34

30

26

17

19

21

m

10

11

12

13

14

15

 VF (Test by pulse)

U+

V+

W+

U-

V-

W-

M

42

42

42

34

30

26

N

34

30

26

38

38

38

 ID

VD1

VD2

VD3

VD4

M

1

4

7

19

N

2

5

8

20

ICE

1

M

A

VD1=15V

2

4

VD2=15V

5

VCE

7

VD3=15V

8

19

VD4=15V

20

N

1

M

VD1=15V

2

4

VD2=15V

5

V

Ic

7

VD3=15V

VCE(SAT)

8

19

VD4=15V

5V

m

N

20

21

M

V

VF

IF

N

ID

A

M

VD*

N

Fig.1

Fig.3

Fig.4

Fig.2