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BQ76PL455A Datasheet(PDF) 7 Page - Texas Instruments |
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BQ76PL455A Datasheet(HTML) 7 Page - Texas Instruments |
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7 / 125 page  7 bq76PL455A www.ti.com SLUSCL0A – SEPTEMBER 2016 – REVISED OCTOBER 2016 Product Folder Links: bq76PL455A Submit Documentation Feedback Copyright © 2016, Texas Instruments Incorporated (1) Stresses beyond those listed under Absolute Maximum Ratings may cause permanent damage to the device. These are stress ratings only, and functional operation of the device at these or any other conditions beyond those indicated under Recommended Operating Conditions is not implied. Exposure to absolute-maximum-rated conditions for extended periods may affect device reliability. (2) Unless otherwise noted, voltages are given with respect to device commons (AGND1–3, DGND1–3, CGND) tied together (device VSS or GND). (3) Specified by design, not tested in production. (4) Must meet all stated conditions for the TOP pin at all times. (5) Must short the highest-connected cell to the unused VSENSEn inputs above it in configurations that use < 16 cells. For example, a 14- cell configuration must short pins VSENSE14, VSENSE15, VSENSE16. 6 Specifications 6.1 Absolute Maximum Ratings over specified Ambient Temperature range (unless otherwise noted) (1) (2) MIN MAX UNIT VP –0.3 6 V VDIG –0.3 6 V VIO –0.3 6 V AUX0–7 Lesser of two MAX values –0.3 6 or (VP + 0.3) V COMMH+, COMMH–, COMML+, COMMH–, FAULTH+, FAULTH–, FAULTL+, FAULTL– Lesser of two MAX values –0.3 6 or (V5VAO + 0.3) V AC pulse specification(3) for these eight pins only: Vpk maximum ≤ 6.5 V for 100 ns or less, 100 kHz ≤ f ≤ 400 MHz –0.3 6.5 Vpk GPIO0–5 Lesser of two MAX values –0.3 6 or (VIO + 0.3) V RX Lesser of two MAX values –0.3 6 or (VIO + 0.3) V TOP (4) –0.3 88 V TOP to VSENSE16 delta(4)(5) (VSENSE16 + 5.5 V) ≥ TOP ≥ (VSENSE16 – 1 V) (VSENSE16 – 1 V) (VSENSE16 + 5.5 V) V VSENSE0 –0.3 0.3 V VSENSEn – VSENSEn–1 n = 1 to 16 –0.3 5.5 V n = 1 to 16, 0.1% duty cycle –0.3 6.5 WAKEUP –0.3 6 V Ambient free-air temperature, TA –40 105 ⁰C Junction temperature, TJ –40 125 ⁰C Storage temperature, Tstg –65 150 °C (1) JEDEC document JEP155 states that 500-V HBM allows safe manufacturing with a standard ESD control process. (2) JEDEC document JEP157 states that 250-V CDM allows safe manufacturing with a standard ESD control process. 6.2 ESD Ratings VALUE UNIT V(ESD) Electrostatic discharge Human-body model (HBM), per ANSI/ESDA/JEDEC JS-001(1) All pins ±2000 V Charged-device model (CDM),per JEDEC specification JESD22-C101(2) All pins except 1, 20, 21, 40, 41, 60, 61, 76, and 80 ±500 Pin 76 ±450 Corner pins (1, 20, 21, 40, 41, 60, 61, and 80) ±750 |
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