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OM25180FDKM Datasheet(PDF) 15 Page - NXP Semiconductors |
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OM25180FDKM Datasheet(HTML) 15 Page - NXP Semiconductors |
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15 / 149 page  PN5180 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.0 — 7 October 2016 240930 15 of 149 NXP Semiconductors PN5180 High-performance multi-protocol full NFC Forum-compliant frontend allowed, meaning that the whole instruction has to be sent or the whole receive buffer has to be read out. The whole transmit buffer shall be written at once as well. No NSS assertion is allowed during data transfer. As the MISO line is per default high-ohmic in case of NSS high, an internal pull-up resistor can be enabled via EEPROM. The BUSY signal is used to indicate that the PN5180 is not able to send or receive data over the SPI interface. The host interface is designed to support the typical interface supply voltages of 1.8 V and 3.3 V of CPUs. A dedicated supply input which defines the host interface supply voltage independent from other supplies is available (PVDD). Only a voltage of 1.8 V or 3.3 V is supported, but no voltage in the range of 1.95 V to 2.7 V. • Master In Slave Out (MISO) The MISO line is configured as an output in a slave device. It is used to transfer data from the slave to the master, with the most significant bit sent first. The MISO signal is put into 3-state mode when NSS is high. • Master Out Slave In (MOSI) The MOSI line is configured as an input in a slave device. It is used to transfer data from the master to a slave, with the most significant bit sent first. • Serial Clock (SCK) The serial clock is used to synchronize data movement both in and out of the device through its MOSI and MISO lines. • Not Slave Select (NSS) The slave select input (NSS) line is used to select a slave device. It shall be set to low before any data transaction starts and must stay low during the transaction. • Busy During frame reception, the BUSY line goes ACTIVE and goes to IDLE when PN5180 is able to receive a new frame or data is available (depending if SET or GET frame is issued). If there is a parameter error, the IRQ is set to ACTIVE and a GENERAL_ERROR_IRQ is set. Both master and slave devices must operate with the same timing. The master device always places data on the MOSI line a half cycle before the clock edge SCK, in order for the slave device to latch the data. The BUSY line is used to indicate that the system is BUSY and cannot receive any data from a host. Recommendation for the BUSY line handling by the host: 1. Assert NSS to Low 2. Perform Data Exchange 3. Wait until BUSY is high 4. Deassert NSS 5. Wait until BUSY is low |
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