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OM25180FDKM Datasheet(PDF) 95 Page - NXP Semiconductors |
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OM25180FDKM Datasheet(HTML) 95 Page - NXP Semiconductors |
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95 / 149 page  PN5180 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.0 — 7 October 2016 240930 95 of 149 NXP Semiconductors PN5180 High-performance multi-protocol full NFC Forum-compliant frontend Table 87. TX_WAIT_CONFIG register (address 0017h) bit description Bit Symbol Access Value Description 27:8 TX_WAIT_VALUE D 0* - FFFFFh Defines the tx_wait timer value. The values TX_WAIT_VALUE and TX_WAIT_PRESCALER are the initial counter values of two independent counters. The counter linked to TX_WAIT_PRESCALER is decremented at every 13.56 MHz clock. As soon as the counter TX_WAIT_PRESCALER overflows (transition from 00h to FFh), the counter linked to TX_WAIT is decremented. At the same time, the counter linked to TX_WAIT_PRESCALER is reloaded with the TX_WAIT_PRESCALER value. The first initial TX_WAIT_PRESCALER counter value is always using the data defined in TX_BITPHASE (in case of PICC operation). All other subsequent counter reload values are taken from TX_WAIT_PRESCALER. Note: If set to 00000h the tx_wait guard time is disabled Note: This bit is set by HW a protocol is detected in automatic mode detector. 7:0 TX_WAIT_PRESCALER D 0* - FFh Defines the prescaler reload value for the tx_wait timer. Note: This bit is set by HW a protocol is detected in automatic mode detector. For correct DPC operation, it is required to set the prescaler to 0x7F For type A communication, the prescaler has to be set to 0x7F as well. Table 88. TX_CONFIG register (address 0018h) bit description Bit Symbol Access Value Description 14:31 RFU R 0 Reserved 13 TX_PARITY_LAST_INV_ENABL E R/W 0 If set to 1; the parity bit of last sent data byte is inverted 12 TX_PARITY_TYPE R/W 0 Defines the type of the parity bit 0 Even Parity is calculated 1 Odd parity is calculated 11 TX_PARITY_ENABLE R/W 0 If set to 1; a parity bit is calculated and appended to each byte transmitted. If the Transmission Of Data Is Enabled and TX_NUM_BYTES_2_SEND is zero; then a NO_DATA_ERROR occurs. 10 TX_DATA_ENABLE R/W 0 If set to 1; transmission of data is enabled otherwise only symbols are transmitted. 8:9 TX_STOP_SYMBOL R/W 0 Defines which pattern symbol is sent as frame stop-symbol 00b No symbol is sent 01b Symbol1 is sent 10b Symbol2 is sent 11b Symbol3 is sent |
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