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OM25180FDKM Datasheet(PDF) 93 Page - NXP Semiconductors

Part # OM25180FDKM
Description  High-performance multi-protocol full NFC Forum-compliant frontend
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Manufacturer  NXP [NXP Semiconductors]
Direct Link  http://www.nxp.com
Logo NXP - NXP Semiconductors

OM25180FDKM Datasheet(HTML) 93 Page - NXP Semiconductors

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PN5180
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© NXP Semiconductors N.V. 2016. All rights reserved.
Product data sheet
COMPANY PUBLIC
Rev. 3.0 — 7 October 2016
240930
93 of 149
NXP Semiconductors
PN5180
High-performance multi-protocol full NFC Forum-compliant frontend
17
RX_PROTOCOL_ERROR
R
0*
This flag is set to 1, when a protocol error has
occurred. A protocol error can be a wrong stop bit, a
missing or wrong ISO/IEC14443 B EOF or SOF or a
wrong number of received data bytes.
Note: When a protocol error is detected, data
reception is stopped.
Note: The flag is automatically cleared at start of next
reception.
16
RX_DATA_INTEGRITY_ERROR
R
0*
This flag is set to 1, if a data integrity error has been
detected. Possible caused can be a wrong parity or a
wrong CRC.
Note: On a data integrity error, the reception is
continued
Note: The flag is automatically cleared at start of next
reception.
Note: If a reversed parity bit is a stop criteria, the flag
is not set to 1 if there is a wrong parity.
13:15
RX_NUM_LAST_BITS
R
0*
Defines the number of valid bits of the last data byte
received in bit-oriented communications. If zero the
whole byte is valid.
9:12
RX_NUM_FRAMES_RECEIVED
R
0*
Indicates the number of frames received. The value is
updated when the RxIRQ is raised.
Note: This bit field is only valid when the RxMultiple is
active (bit RX_MULTIPLE_ENABLE set)
8:0
RX_NUM_BYTES_RECEIVED
R
0*
Indicates the number of bytes received. The value is
valid when the RxIRQ is raised until the receiver is
enabled again.
Table 83.
RX_STATUS_REG register (address 0013h) bit description …continued
Bit
Symbol
Access
Value
Description
Table 84.
TX_UNDERSHOOT_CONFIG register (address 0014h) bit description
Bit
Symbol
Access
Value
Description
16:31
TX_UNDERSHOOT_PATTERN
Undershoot pattern which is transmitted after each
falling edge.
5:15
RESERVED
-
1:4
TX_UNDERSHOOT_PATTERN_
LEN
Defines length of the undershoot prevention pattern
(value +1). The pattern is applied starting from the
LSB of the defined pattern; all other bits are ignored.
0
TX_UNDERSHOOT_PROT_ENA
BLE
If set to 1; the undershoot protection is enabled
Table 85.
TX_OVERSHOOT_CONFIG register (address 0015h) bit description
Bit
Symbol
Access
Value
Description
31:16
TX_OVERSHOOT_PATTERN
R/W
0* -
FFFFh
Overshoot pattern which is transmitted after each
rising edge.


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