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OM25180FDKM Datasheet(PDF) 91 Page - NXP Semiconductors |
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OM25180FDKM Datasheet(HTML) 91 Page - NXP Semiconductors |
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91 / 149 page  PN5180 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.0 — 7 October 2016 240930 91 of 149 NXP Semiconductors PN5180 High-performance multi-protocol full NFC Forum-compliant frontend Table 81. RX_WAIT_CONFIG (address 0011h) bit description Bit Symbol Access Value Description 8:27 RX_WAIT_VALUE R/W 0* Defines the rx_wait timer reload value. Note: If set to 00000h, the rx_wait guard time is disabled 0:7 RX_WAIT_PRESCALER R/W 0* Defines the prescaler reload value for the rx_wait timer. For correct DPC operation, it is required to set the prescaler to 0x7F For type A communication, the prescaler has to be set to 0x7F as well. Table 82. CRC_RX_CONFIG (address 0012h) bit description Bit Symbol Access Value Description 31:16 RX_CRC_PRESET_VALUE R/W 0*-FFFFh Arbitrary preset value for the Rx-Encoder CRC calculation. 15:12 RFU R 0 Reserved 11 RX_PARITY_TYPE R/W 0* Defines which type of the parity-bit is used Note: This bit is set by the mod-detector if automatic mode detection is enabled and ISO14443A communication is detected. 0 Even parity calculation is used 1 Odd parity calculation is used 10 RX_PARITY_ENABLE R/W 0* If set to 1; a parity-bit for each byte is expected; will be extracted from data stream and checked for correctness. In case the parity-bit is incorrect; the RX_DATA_INTEGRITY_ERROR flag is set. Nevertheless the reception is continued. Note: This bit is set by the mod-detector if automatic mode detection is enabled and ISO14443A communication is detected. 9 VALUES_AFTER_COLLISION R/W 0* This bit defined the value of bits received after a collision occurred. 0* All received bits after a collision will be cleared. 1 All received bits after a collision keep their value. 8:6 RX_BIT_ALIGN R/W 0* RxAlign defines the bit position within the byte for the first bit received. Further received bits are stored at the following bit positions. |
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