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OM25180FDKM Datasheet(PDF) 9 Page - NXP Semiconductors |
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OM25180FDKM Datasheet(HTML) 9 Page - NXP Semiconductors |
9 / 149 page PN5180 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.0 — 7 October 2016 240930 9 of 149 NXP Semiconductors PN5180 High-performance multi-protocol full NFC Forum-compliant frontend The pinning of the TFBGA version can be found in the data sheet addendum which is available through the NXP DocStore. n.c. 20 - leave unconnected, do not ground TX1 21 O Antenna driver output 1 TVDD 22 supply Antenna driver supply ANT1 23 I Antenna connection 1 for load modulation in card emulation mode (only in case of PLM) ANT2 24 I Antenna connection 2 for load modulation in card emulation mode (only in case of PLM) VDHF 25 supply Stabilizing capacitor connection output VBAT 26 supply Supply Connection, all VBAT mandatory to be connected VSS 27 supply Ground AVDD 28 supply Analog VDD supply voltage input (1.8 V), connected to VDD VDD 29 supply VDD output (1.8 V) DVDD 30 supply Digital supply voltage input (1.8 V), connected to VDD n.c. 31 - leave unconnected, do not ground n.c. 32 - leave unconnected, do not ground n.c. 33 - leave unconnected, do not ground n.c. 34 - leave unconnected, do not ground n.c. 35 - leave unconnected, do not ground CLK1 36 I Clock input for crystal. This pin is also used as input for an external generated accurate clock (8 MHz, 12 MHz, 16 MHz, 24 MHz, other clock frequencies not supported) CLK2 37 O Clock output (amplifier inverted signal output) for crystal GPO1 38 O (double function pin) GPO1, Digital output 1 IRQ 39 O Interrupt request output, active level configurable AUX1 40 O Analog/Digital Test signal Table 4. Pin description HVQFN40 …continued Symbol Pin Type Description |
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