OM25180FDKM datasheet(49/149 Pages) NXP

Part #	OM25180FDKM

Description	High-performance multi-protocol full NFC Forum-compliant frontend

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Manufacturer	NXP [NXP Semiconductors]

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PN5180

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Product data sheet

COMPANY PUBLIC

Rev. 3.0 — 7 October 2016

240930

49 of 149

NXP Semiconductors

PN5180

High-performance multi-protocol full NFC Forum-compliant frontend

11.6.2.2

Digital Debug Output Pin Configuration

11.6.3 Analog Debug Configuration

For the output of an analog debug signal, two pins are available, BUSY and AUX2.

The function of the output pins is defined by two parameters of the command

11.7 AUX2 / DWL_REQ

11.7.1 Firmware update

The PN5180 offers the possibility to upgrade the internal Firmware.

The pin AUX2/DWL request is a double function pin. During start-up (time from power-up

of the IC until IDLE IRQ is raised), the pin is used in input mode. If the polarity on this

AUX2/DWL_REQ pin during start-up is high, the PN5180 enters the download mode.

Table 49.

Receiver Error Group

Value low nibble

(HEX)

Debug Function

9..15

RFU

8

13.56 MHz clock is put out

7

Combination of data/protocol error and collision

6

Set if RxMultiple is set, and the LEN byte indicates more than 28 bytes

5..3

RFU

2

Set if a collision has been detected

1

Protocol error flag

0

Data integrity error flag (Parity, CRC (Collision))

Table 50.

Debug Signal Output Pin Configuration

Value high nibble

(HEX)

Debug Function (PIN)

0IRQ (39)

1

GPO (38)

2AUX2 (2)

3

AUX1 (40)

all others

RFU

Table 51.

Parameter (hex)

Debug Function

0

Analog output of value defined in register DAC_VALUE

1

Receiver Q-channel signal; depending on SIGPRO_IN_SEL either

samples signals from ADC, tx_envelope or SigIn

2

Receiver I-channel signal; depending on SIGPRO_IN_SEL either

samples signals from ADC, tx_envelope or SigIn

3

Filtered Q-channel signal (rect-filter)

4

Filtered I-channel signal (rect-filter)

all others

RFU

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