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OM25180FDKM Datasheet(PDF) 47 Page - NXP Semiconductors |
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OM25180FDKM Datasheet(HTML) 47 Page - NXP Semiconductors |
47 / 149 page PN5180 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.0 — 7 October 2016 240930 47 of 149 NXP Semiconductors PN5180 High-performance multi-protocol full NFC Forum-compliant frontend The second parameter defines the pin which is used for output of the test signal in the high nibble, and the signal from one of the Debug Signal groups that are put out in the low nibble. 11.6.2.1 Debug signal groups Table 43. Clock Signal Group Value low nibble (HEX) Debug Function 9..15 RFU 8 13.56 MHz clock is put out 7 CLIF clock reset 6 Signal indicating the PLL is locked 5 Signal indicating an external Field is present 4 20 MHz clock from the high frequency oscillator 3 27.12 MHz clock from the PLL 2 27.12 MHz clock from the RF clock recovery 1 Multiplexed 27.12 MHz clock 0 Multiplexed 13.56 MHz clock Table 44. Transmitter Encoder Group Value low nibble (HEX) Debug Function 9..15 RFU 8 13.56 MHz clock is put out 7..2 RFU 1 Output TX envelope 0 Tx-IRQ Table 45. Timer Group Value low nibble (HEX) Debug Function 9..15 RFU 8 13.56 MHz clock is put out 7 Running flag of timer T0 6 Expiration flag of timer T0 5 Running flag of timer T1 4 Expiration flag of timer T1 3 Running flag of timer T2 2 Expiration flag of timer T2 1..0 RFU |
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