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OM25180FDKM Datasheet(PDF) 42 Page - NXP Semiconductors |
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OM25180FDKM Datasheet(HTML) 42 Page - NXP Semiconductors |
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42 / 149 page  PN5180 All information provided in this document is subject to legal disclaimers. © NXP Semiconductors N.V. 2016. All rights reserved. Product data sheet COMPANY PUBLIC Rev. 3.0 — 7 October 2016 240930 42 of 149 NXP Semiconductors PN5180 High-performance multi-protocol full NFC Forum-compliant frontend 1:0 LPCD Mode 00b - Use EEPROM value of LPCD_REFERENCE_VALUE for reference value 01b - Use on begin of an LPCD a measurement cycle for generating a reference value. 10b - Use AGC Reference value and AGC gear from the register AGC_REG_CONFIG. 11b - RFU 2 GPO1 Control for external TVDD LDO 0b - Disable Control of external TVDD LDO via GPO1 1b - Enable Control of external TVDD LDO via GPO1 3 GPO2 Control for external TVDD LDO during wake-up from standby 0b - Disable Control of external TVDD LDO via GPO2 on LPCD Card Detect 1b - Enable Control of external TVDD LDO via GPO2 on LPCD Card Detect 4 GPO1 Control for external TVDD LDO during wake-up from standby 0b - Disable Control of external TVDD LDO via GPO1 on wake-up from standby 1b - Enable Control of external TVDD LDO via GPO1 on wake-up from standby 0x39 LPCD_GPO_TOGGLE_BE FORE_FIELD_ON RW 1 7-0 1 byte value defines the time between setting GPO1 until Field is switched on. The time can be configured in 8 bits in 5us steps 0x3A LPCD_GPO_TOGGLE_AF TER_FIELD_ON RW 1 7-0 1 byte value defines the time between Field Off and clear GPO1. The time can be configured in 8 bits in 5us steps 0x3B NFCLD_SENSITIVITY_VAL RW 1 7-0 NFCLD Sensitivity value to be used during the RF On Field handling Procedure. 0x3C FIELD_ON_CP_SETTLE_T IME RW 1 7-0 Delay in 4us steps (range: 0 - 1020us) to wait during RF on for charge pumps to be settled, to avoid initial Tx driver overcurrent 0x3D RFU RW 2 15-0 RFU 0x3F RF_DEBOUNCE_TIMEOU T RW 1 7-0 RF Debounce Timeout in step size of 10 s 0x40 SENS_RES RW 2 15-0 Response to ReqA / ATQA in order byte 0, byte 1 0x42 NFCID1 RW 3 23-0 If Random UID is disabled (EEPROM address 0x51), the content of these addresses is used to generate a Fixed UID. The order is byte 0, byte 1, byte 2; the first NFCID1 byte is fixed to 08h, the check byte is calculated automatically Table 41. EEPROM Addresses …continued EEPROM Address (HEX) Field / Value Access Size (bytes) Bits Comments |
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