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SCC68681 Datasheet(PDF) 5 Page - NXP Semiconductors |
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SCC68681 Datasheet(HTML) 5 Page - NXP Semiconductors |
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5 / 29 page  Philips Semiconductors Product data SCC68681 Dual asynchronous receiver/transmitter (DUART) 2004 Apr 06 5 BLOCK DIAGRAM 8 D0–D7 R/WN DTACKN CSN A1–A4 RESETN INTRN X1/CLK X2 4 BUS BUFFER OPERATION CONTROL ADDRESS DECODE R/W CONTROL INTERRUPT CONTROL IMR ISR TIMING BAUD RATE GENERATOR CLOCK SELECTORS COUNTER/ TIMER XTAL OSC CSRA CSRB ACR CTLR CHANNEL A TRANSMIT HOLDING REG TRANSMIT SHIFT REGISTER RECEIVE HOLDING REG (3) RECEIVE SHIFT REGISTER MR1, 2 CRA SRA INPUT PORT CHANGE OF STATE DETECTORS (4) OUTPUT PORT FUNCTION SELECT LOGIC OPCR TxDA RxDA IP0-IP5 OP0-OP7 VCC GND IVR CHANNEL B (AS ABOVE) IPCR ACR OPR CTLR U IACKN RxDB TxDB 8 6 SD00108 Figure 2. Block Diagram |
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