512Kx8 Static RAM Module
CYM1464
Cypress Semiconductor Corporation
•
3901 North First Street
•
San Jose
•
CA 95134
•
408-943-2600
Document #: 38-05272 Rev. **
Revised March 15, 2002
64
Features
• High-density 4-megabit SRAM module
• High-speed CMOS SRAMs
— Access time of 20 ns
• Low active power
— 1.93W (max.)
• JEDEC-compatible pinout
• 32-pin, 0.6-inch-wide DIP package
• TTL-compatible inputs and outputs
• Low profile
— Max. height of 0.34 inches
Functional Description
The CYM1464 is a high-performance 4-megabit static RAM
module organized as 512K words by 8 bits. This module is
constructed using four 256K x 4 static RAMs in SOJ packages
mounted on an epoxy laminate substrate with pins.
Writing to the module is accomplished when the chip select
(CS) and write enable (WE) inputs are both LOW. Data on the
eight input/output pins (I/O0 through I/O7) of the device is writ-
ten into the memory location specified on the address pins (A0
through A18). Reading the device is accomplished by taking
chip select and output enable (OE) LOW, while write enable
(WE) remains inactive or HIGH. Under these conditions, the
contents of the memory location specified on the address pins
(A0 through A18) will appear on the eight appropriate data in-
put/output pins (I/O0 through I/O7).
The input/output pins remain in a high-impedance state unless
the module is selected, outputs are enabled, and write enable
(WE) is HIGH.
Logic Block Diagram
Pin Configuration
Top View
DIP
25
26
27
28
29
30
31
32
23
24
21
22
19
20
17
18
1
2
3
4
5
6
7
8
9
10
11
12
13
14
15
16
S
A18
A16
A14
A12
A7
A6
A5
A4
A3
A2
A1
A0
I/O0
I/O1
I/O2
GND
VCC
A15
A17
WE
A13
A8
A9
A11
OE
A10
CS
I/O7
I/O6
I/O5
I/O4
I/O3
0
I/O
7
1 OF 2
DECODER
SRAM
256K x 4
SRAM
A0 − A17
WE
OE
A18
CS
− I/O
256K x 4
SRAM
256K x 4
SRAM
256K x 4
Selection Guide
1464-20
1464-22
1464-25
1464-30
1464-35
1464-45
1464-55
Maximum Access Time (ns)
20
22
25
30
35
45
55
Maximum Operating Current (mA)
350
350
300
300
Maximum Standby Current (mA)
240
240
240
240
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