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GS9092A Datasheet(PDF) 49 Page - Semtech Corporation |
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GS9092A Datasheet(HTML) 49 Page - Semtech Corporation |
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49 / 61 page  GS9092A GenLINX® III 270Mb/s Serializer for SDI and DVB-ASI Final Data Sheet 34715 - 5 February 2013 49 of 61 3.11 Programmable Multi-function I/O The GS9092A has a multi-function I/O port that uses 3 pins, STAT0 through STAT2. Each pin can be programmed via the host interface to output one of the following signals: H, V, F, FIFO_FULL, and FIFO_EMPTY (see Table 3-9). The pins may also act as inputs for external H, V and F signals if DETECT_TRS is set LOW. Alternatively, STAT[2:0] may be set to a high-impedance state. The registers that determine the signals present on the STAT [2:0] pins are labelled STAT0_CONFIG[2:0], STAT1_CONFIG[2:0], and STAT2_CONFIG[2:0] respectively. Table 3-10 shows the setting of the IO_CONFIG registers for each of the available output signals. The default setting for each IO_CONFIG register depends on the configuration of the device and the internal FIFO mode selected. This is shown in Table 3-11. Note: The FIFO_FULL and FIFO_EMPTY flags can only be displayed on the STAT[2:0] pins when the device is in DVB-ASI mode. If the FIFO_FULL or FIFO_EMPTY value (100b Table 3-9: I/O Signals Available on Multi-function I/O Ports I/O Status Signal Reference H Section 3.4.1 V Section 3.4.1 F Section 3.4.1 FIFO_FULL Section 3.3.2.1 FIFO_EMPTY Section 3.3.2.1 Table 3-10: IO_CONFIG Settings Function I/O DETECT_TRS Setting IO_CONFIG Setting H Input LOW 000b Output HIGH 000b V Input LOW 001b Output HIGH 001b F Input LOW 010b Output HIGH 010b High Z Output X 011b High Z Output X 100b High Z Output X 101b FIFO_FULL Output X 110b FIFO_EMPTY Output X 111b |
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