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GS9092A Datasheet(PDF) 35 Page - Semtech Corporation |
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GS9092A Datasheet(HTML) 35 Page - Semtech Corporation |
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35 / 61 page  GS9092A GenLINX® III 270Mb/s Serializer for SDI and DVB-ASI Final Data Sheet 34715 - 5 February 2013 35 of 61 Figure 3-8: H, V, and F Input Timing 3.5 DVB-ASI Mode The GS9092A enters DVB-ASI mode when the application layer sets the DVB_ASI pin HIGH. In this mode, all SMPTE processing functions are disabled, and the 8-bit transport stream data will be 8b/10b encoded prior to serialization. 3.5.1 Control Signal Inputs In DVB-ASI mode, the DIN9 and DIN8 will be configured as DVB-ASI control signals INSSYNCIN and K_IN respectively. When INSSYNCIN is set HIGH, the device will insert K28.5 sync characters into the data stream. This function is used to assist system implementations where the GS9092A's internal FIFO is disabled (FIFO_EN = LOW), and the device is preceded by an external FIFO. Parallel data may be clocked into the external FIFO at some rate less than 27MHz. The INSSYNCIN input may then be connected to the FIFO empty signal, thus providing a means of padding up the data transmission rate to 27MHz. Note 1: If the internal FIFO is enabled (FIFO_EN = HIGH), the INSSYNCIN pin should be grounded (see DVB-ASI Mode on page 27). Note 2: In DVB-ASI mode, 8b/10b encoding will take place after K28.5 sync character insertion. K_IN should be set HIGH whenever the parallel data input is to be interpreted as any special character (including the K28.5 sync character), defined by the DVB-ASI standard. This pin should be set LOW when the input is to be interpreted as data. Y/Cr/Cb DATA INPUT PCLK H V F XYZ (eav) 000 000 3FF XYZ (sav) 000 000 3FF H SIGNAL TIMING: H_CONFIG = LOW (Default) H_CONFIG = HIGH |
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