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GS9090B Datasheet(PDF) 9 Page - Semtech Corporation |
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GS9090B Datasheet(HTML) 9 Page - Semtech Corporation |
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9 / 72 page  GS9090B GenLINX® III 270Mb/s Deserializer for SDI Data Sheet 40749 - 5 May 2010 9 of 72 30 RD_CLK – Input FIFO READ CLOCK Signal levels are LVCMOS / LVTTL compatible. The parallel data will be clocked out of the FIFO on the rising edge of RD_CLK. 31 RD_RESET Synchronous with RD_CLK Input FIFO READ RESET Signal levels are LVCMOS / LVTTL compatible. Valid input only when the device is in SMPTE mode (SMPTE_BYPASS = HIGH and DVB-ASI = LOW), and the internal FIFO is configured for video mode (See Video Mode on page 47). A HIGH to LOW transition will reset the FIFO pointer to address zero of the memory. 32 - 41 DOUT[0:9] Synchronous with RD_CLK or PCLK Output PARALLEL VIDEO DATA BUS Signal levels are LVCMOS / LVTTL compatible. When the internal FIFO is enabled and configured for either video mode or DVB-ASI mode, parallel data will be clocked out of the device on the rising edge of RD_CLK. When the internal FIFO is in bypass mode, parallel data will be clocked out of the device on the rising edge of PCLK. DOUT9 is the MSB and DOUT0 is the LSB. 44 PCLK – Output PIXEL CLOCK OUTPUT Signal levels are LVCMOS / LVTTL compatible. 27MHz parallel clock output. 46 LOCKED Synchronous with PCLK Output STATUS SIGNAL OUTPUT Signal levels are LVCMOS / LVTTL compatible. The LOCKED signal will be HIGH whenever the device has correctly received and locked to SMPTE compliant data in SMPTE mode or DVB-ASI compliant data in DVB-ASI mode, or when the reclocker has achieved lock in Data-Through mode. It will be LOW otherwise. When the signal is LOW, all digital output signals will be forced to logic LOW levels. 47 DVB_ASI Non Synchronous Input / Output CONTROL SIGNAL INPUT / STATUS SIGNAL OUTPUT Signal levels are LVCMOS / LVTTL compatible. This pin and its function are only supported in Manual mode (AUTO/MAN = LOW). When this pin is set HIGH, the device will be configured to operate in DVB-ASI mode. The SMPTE_BYPASS pin will be ignored. When set LOW, the device will not support the decoding or word alignment of received DVB-ASI data. Table 1-1: Pin List and Description (Continued) |
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