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GS2970A Datasheet(PDF) 13 Page - Semtech Corporation |
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GS2970A Datasheet(HTML) 13 Page - Semtech Corporation |
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13 / 150 page  GS2970A 3Gb/s, HD, SD SDI Receiver Data Sheet 54244 - 2 September 2012 13 of 150 E8 SDIN_TDI Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. GSPI serial data in/test data in. In JTAG mode (JTAG/HOST = HIGH), this pin is used to shift test data into the device. In host interface mode, this pin is used to write address and configuration data words into the device. F1 TERM Analog Input Decoupling for internal SDI termination resistors. F7 CS_TMS Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Chip select / test mode start. In JTAG mode (JTAG/HOST = HIGH), this pin is Test Mode Start, used to control the operation of the JTAG test. In host interface mode (JTAG/HOST = LOW), this pin operates as the host interface chip select and is active LOW. F8 SCLK_TCK Input COMMUNICATION SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. Serial data clock signal. In JTAG mode (JTAG/HOST = HIGH), this pin is the JTAG clock. In host interface mode (JTAG/HOST = LOW), this pin is the host interface serial bit clock. All JTAG/host interface addresses and data are shifted into/out of the device synchronously with this clock. F9, F10, H9, H10, J8, J9, J10, K8, K9, K10 DOUT8, 9, 6, 7, 1, 4, 5, 0, 2, 3 Output PARALLEL DATA BUS Please refer to the Output Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. 20-bit mode 20bit/10bit = HIGH SMPTE mode (SMPTE_BYPASS = HIGH and DVB_ASI = LOW): Chroma data output for SD and HD data rates; Data Stream 2 for 3G data rate DVB-ASI mode (SMPTE_BYPASS = LOW and DVB_ASI = HIGH): Not defined Data-Through mode (SMPTE_BYPASS = LOW and DVB_ASI = LOW): Data output 10-bit mode 20bit/10bit = LOW Forced LOW G3RC_BYP Input CONTROL SIGNAL INPUT Please refer to the Input Logic parameters in the DC Electrical Characteristics table for logic level threshold and compatibility. When this pin is LOW, the serial digital output is the buffered version of the input serial data. When this pin is HIGH, the serial digital output is the reclocked version of the input serial data. Table 1-1:Pin Descriptions (Continued) Pin Number Name Timing Type Description |
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