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GS2970A Datasheet(PDF) 84 Page - Semtech Corporation |
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GS2970A Datasheet(HTML) 84 Page - Semtech Corporation |
84 / 150 page GS2970A 3Gb/s, HD, SD SDI Receiver Data Sheet 54244 - 2 September 2012 84 of 150 Figure 4-38:Serial Audio, Left Justified, MSB First Figure 4-39:Serial Audio, Left Justified, LSB First Figure 4-40:Serial Audio, Right Justified, MSB First Figure 4-41:Serial Audio, Right Justified, LSB First 4.19.2.1 AES/EBU Mode In AES/EBU output mode, the audio de-embedder uses a 128fs (6.144MHz audio bit clock) clock as shown in Figure 4-42. Figure 4-42:AES/EBU Audio Output to Bit Clock Timing 4.19.2.2 Audio Data Packet Extraction Block The audio de-embedder looks for audio data packets on every line of the incoming video. The audio data must be embedded according to SMPTE 272M (SD) or SMPTE 299M (HD or 3G). WCLK ACLK AOUT[8/7:2/1] 23 MSB 0 2 21 2 3 4 5 6 21 LSB 23 MSB 0 2 21 2 3 4 5 6 21 LSB Channel A (Left) Channel B (Right) WCLK ACLK AOUT[8/7:2/1] 0 LSB 3 2 122 21 20 19 18 17 2 MSB 0 LSB 3 2 122 21 20 19 18 17 2 MSB Channel A (Left) Channel B (Right) WCLK ACLK AOUT[8/7:2/1] 23 MSB 0 2 21 2 20 17 18 19 21 LSB 23 MSB 0 2 21 2 20 17 18 19 21 LSB Channel A (Left) Channel B (Right) WCLK ACLK AOUT[8/7:2/1] 0 LSB 3 2 122 21 36 5 4 2 MSB 0 LSB 3 2 122 21 36 5 4 2 MSB Channel A (Left) Channel B (Right) AMCLK (128fs) AOUT_1/2, AOUT_3/4 AOUT_5/6, AOUT_7/8 6.144MHz |
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