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GS2970A Datasheet(PDF) 82 Page - Semtech Corporation |
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GS2970A Datasheet(HTML) 82 Page - Semtech Corporation |
82 / 150 page ![]() GS2970A 3Gb/s, HD, SD SDI Receiver Data Sheet 54244 - 2 September 2012 82 of 150 The timing of the serial audio output signals and the ACLK output signal is shown in Figure 4-35: ACLK to Data Signal Output Timing. Figure 4-35:ACLK to Data Signal Output Timing When AUDIO_EN/DIS is set HIGH, audio extraction is enabled and the audio output signals are extracted from the video data stream. When set LOW, the serial audio outputs, ACLK and WCLK outputs are set LOW. In addition, all functional logic associated with audio extraction is disabled to reduce power consumption. WCLK Word clock AMCLK Audio Master Clock, selectable 128fs, 256fs, or 512fs Table 4-16:Serial Audio Pin Descriptions (Continued) Audio Pin Name Description I/O Timing Specs: AOUT* ACLK A1 A0 A2 128fs = 162.76ns (AES/EBU) 64fs = 325.52ns (other modes) 20% 80% tr 20% 80% tf A3 Audio Outputs: toh tod toh tr/tf (min) Cload tod tr/tf (max) Cload toh tr/tf (min) Cload tod tr/tf (max) Cload AOUT 1.500ns 0.600ns 6 pF 7.000ns 2.200ns 15 pF 1.500ns 0.600ns 6 pF 7.000ns 2.300ns 15 pF Audio Outputs 3.3V 1.8V |
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