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GS2970A Datasheet(PDF) 81 Page - Semtech Corporation

Part # GS2970A
Description  3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing
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Manufacturer  SEMTECH [Semtech Corporation]
Direct Link  http://www.semtech.com
Logo SEMTECH - Semtech Corporation

GS2970A Datasheet(HTML) 81 Page - Semtech Corporation

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GS2970A 3Gb/s, HD, SD SDI Receiver
Data Sheet
54244 - 2
September 2012
81 of 150
1. Assert the B to A converter reset by writing '1' to bit 3 of register 05Eh.
2. Monitor H-pulse for a high-to-low transition.
3. De-assert the B to A converter reset by writing '0' to bit 3 of register 05Eh. This must
be completed at the beginning of SAV and should be completed in 1920 PCLK
periods.
4.19 Audio De-embedder
The GS2970A includes an integrated audio de-embedder which is enabled by default in
SMPTE mode. It can be disabled by setting the AUDIO_EN/DIS pin LOW, or by setting the
host interface AUD_EXT_MASK bit to HIGH, or by keeping IOPROC_EN/DIS pin LOW.
In non-SMPTE modes, the audio de-embedder is not active.
Up to eight channels of audio may be extracted from the received serial digital video
stream. The output signal formats supported by the device include AES/EBU, I2S
(default) and industry standard serial digital formats.
16, 20 and 24-bit audio bit depths are supported for 48kHz synchronous audio for SD
data rates. For HD and 3G data rates, 16, 20 and 24-bit audio bit depths are supported for
48kHz audio. The audio may be synchronous or asynchronous to the video.
In 3G mode:
• In Level A mode, all Audio Control Packets are extracted from Data Stream One and
all Audio Data Packets are extracted from Data Stream Two, in accordance with
SMPTE 425M. This is similar to HD, in which Audio Control Packets are embedded
in the Luma channel and audio data packets in the Chroma channel
• In Level B mode, extraction of audio packets from Link A (default) or Link B is
selectable via the AUDIO_SEL_DS2_DS1 bit in the host interface
Additional audio processing features include audio mute on loss of lock, de-embed and
delete, group selection, audio output re-mapping, ECC error detection and correction
(HD/3G modes only), and audio channel status extraction.
4.19.1 Serial Audio Data I/O Signals
The Serial Audio Data I/O pins are listed in Table 4-16: Serial Audio Pin Descriptions.
Table 4-16:Serial Audio Pin Descriptions
Audio
Pin Name
Description
AUDIO_EN/DIS
Enable Input for Audio Processing
AOUT_1/2
Serial Audio output; Channels 1 and 2
AOUT_3/4
Serial Audio output; Channels 3 and 4
AOUT_5/6Serial Audio Output; Channels 5 and 6
AOUT_7/8
Serial Audio Output; Channels 7 and 8
ACLK
64fs clock


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