GS2970A datasheet(7/150 Pages) SEMTECH

Part #	GS2970A

Description	3Gb/s, HD, SD SDI Receiver Complete with SMPTE Audio and Video Processing

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Manufacturer	SEMTECH [Semtech Corporation]

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GS2970A 3Gb/s, HD, SD SDI Receiver

Data Sheet

54244 - 2

September 2012

7 of 150

Figure 4-35: ACLK to Data and WCLK Signal Output Timing ......................................................... 80

Figure 4-36: I2S Audio Output Format .................................................................................................... 81

Figure 4-37: AES/EBU Audio Output Format .......................................................................................81

Figure 4-38: Serial Audio, Left Justified, MSB First ............................................................................. 82

Figure 4-39: Serial Audio, Left Justified, LSB First .............................................................................. 82

Figure 4-40: Serial Audio, Right Justified, MSB First ..........................................................................82

Figure 4-41: Serial Audio, Right Justified, LSB First ........................................................................... 82

Figure 4-42: AES/EBU Audio Output to Bit Clock Timing ................................................................ 82

Figure 4-43: ECC 24-bit Array and Examples ...................................................................................... 85

Figure 4-44: Sample Distribution over 5 Video Frames (525-line Systems) ............................... 87

Figure 4-45: Audio Buffer After Initial 26 Sample Write .................................................................. 87

Figure 4-46: Audio Buffer Pointer Boundary Checking .................................................................... 88

Figure 4-47: GSPI Application Interface Connection ........................................................................ 93

Figure 4-48: Command Word Format ..................................................................................................... 93

Figure 4-49: Data Word Format ................................................................................................................ 94

Figure 4-50: Write Mode .............................................................................................................................. 95

Figure 4-51: Read Mode ............................................................................................................................... 95

Figure 4-52: GSPI Time Delay .................................................................................................................... 95

Figure 4-53: In-Circuit JTAG ....................................................................................................................142

Figure 4-54: System JTAG .........................................................................................................................142

Figure 4-55: Reset Pulse .............................................................................................................................143

Figure 7-1: Pb-free Solder Reflow Profile ............................................................................................148

List of Tables

Table 1-1: Pin Descriptions ............................................................................................................................ 9

Table 2-1: Absolute Maximum Ratings................................................................................................... 16

Table 2-2: Recommended Operating Conditions................................................................................ 16

Table 2-3: DC Electrical Characteristics ................................................................................................. 17

Table 2-4: AC Electrical Characteristics ................................................................................................. 19

Table 4-1: Serial Digital Output................................................................................................................. 29

Table 4-2: PLL Loop Bandwidth ................................................................................................................ 30

Table 4-3: Input Clock Requirements...................................................................................................... 31

Table 4-4: Lock Detect Conditions............................................................................................................ 32

Table 4-5: GS2970A Output Video Data Format Selections ............................................................ 36

Table 4-6: GS2970A PCLK Output Rates ................................................................................................ 38

Table 4-7: Switch Line Position for Digital Systems ........................................................................... 44

Table 4-8: Output Signals Available on Programmable Multi-Function Pins............................ 46

Table 4-9: Supported CEA-861 Formats................................................................................................. 49

Table 4-10: CEA861 Timing Formats....................................................................................................... 50

Table 4-11: Supported Video Standard Codes ..................................................................................... 57

Table 4-12: Data Format Register Codes ................................................................................................ 61

Table 4-13: Error Status Register and Error Mask Register.............................................................. 63

Table 4-14: SMPTE 352M Packet Data .................................................................................................... 69

Table 4-15: IOPROC_DISABLE Register Bits......................................................................................... 71

Table 4-16: Serial Audio Pin Descriptions ............................................................................................. 79

Table 4-17: Audio Output Formats........................................................................................................... 81

Table 4-18: Audio Data Packet Detect Register ................................................................................... 83

Table 4-19: Audio Group DID Host Interface Settings....................................................................... 84

Table 4-20: Audio Data and Control Packet DID Setting Register................................................. 84

Table 4-21: Audio Buffer Pointer Offset Settings ................................................................................ 88

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