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GS2970A Datasheet(PDF) 45 Page - Semtech Corporation |
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GS2970A Datasheet(HTML) 45 Page - Semtech Corporation |
45 / 150 page GS2970A 3Gb/s, HD, SD SDI Receiver Data Sheet 54244 - 2 September 2012 45 of 150 4.10.2 Automatic Switch Line Lock Handling The synchronous switch point is defined for all major video standards in SMPTE RP168-2002. The device automatically re-synchronizes the word alignment block and timing signal generator at the switch point, based on the detected video standard. The device, as described in Section 4.10.1 and Figure 4-10 above, implements the re-synchronization process automatically, every field/frame. The switch line is defined as follows: • For 525 line interlaced systems: resynchronization takes place at then end of lines 10 & 273 • For 525 line progressive systems: resynchronization takes place at then end of line 10 • For 625 line interlaced systems: resynchronization takes place at then end of lines 6 & 319 • For 625 line progressive systems: resynchronization takes place at then end of line 6 • For 750 line progressive systems: resynchronization takes place at then end of line 7 • For 1125 line interlaced systems: resynchronization takes place at then end of lines 7 & 568 • For 1125 line progressive systems: resynchronization takes place at then end of line 7 NOTE: Unless indicated by SMPTE 352M payload identifier packets, the GS2970A does not distinguish between 1125-line progressive segmented-frame (PsF) video and 1125-line interlaced video operating at 25 or 30fps. However. PsF video operating at 24fps is detected by the device. A full list of all major video standards and switching lines is shown in Table 4-7. 4.10.3 Switch Line Lock Handling During Level B to Level A Conversion When 3G data is detected by the GS2970A, and Level B to Level A conversion is enabled, the device only supports a limited phase offset between two synchronous video sources if a synchronous switch is implemented. If the synchronous switch point results in an “extended” active video period, the GS2970A only re-synchronizes to the following TRS ID if the phase difference between the two sources is less than or equal to 10 μs. If the phase difference is greater than 10μs, the GS2970A takes one additional line to re-synchronize. In this case, the user may observe a missing H pulse on the line following the switch line, on the H timing output. Note that this 10 μs constraint is only valid when Level B to Level A conversion is enabled, and only when the synchronous switch point results in an extended active video area. |
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