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GS1661A Datasheet(PDF) 54 Page - Semtech Corporation |
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GS1661A Datasheet(HTML) 54 Page - Semtech Corporation |
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54 / 85 page  GS1661A HD/SD SDI Receiver Data Sheet 54387 - 2 September 2012 54 of 85 If a mismatch in the calculated and received CRC values is detected for Y channel data, the YCRC_ERR bit in the ERROR_STAT_X register is set HIGH. If a mismatch in the calculated and received CRC values is detected for C channel data, the CCRC_ERR bit in the ERROR_STAT_X register is set HIGH. Y or C CRC errors are also generated if CRC values are not embedded. Line based CRC errors are only generated when the device is operating in HD mode. NOTE: By default, 8-bit to 10-bit TRS remapping is enabled. If an 8-bit input is used, the HD CRC check is based on the 10-bit remapped value, not the 8-bit value, so the CRC Error Flag is incorrectly asserted and should be ignored. If 8-bit to 10-bit remapping is enabled, then CRC correction and insertion should be enabled by setting the CRC_INS_MASK bit in the IOPROC_DISABLE register LOW. This ensures that the CRC values are updated. 4.15.3 EDH CRC Error Detection The GS1661A also calculates Full Field (FF) and Active Picture (AP) CRC's according to SMPTE RP165 in support of Error Detection and Handling packets in SD signals. These calculated CRC values are compared with the received CRC values. Error flags for AP and FF CRC errors are provided and each error flag is a logical OR of field 1 and field 2 error conditions. The AP_CRC_ERR bit in the VIDEO_ERROR_STAT_X register is set HIGH when an Active Picture CRC mismatch has been detected in field 1 or 2. The FF_CRC_ERR bit in the VIDEO_ERROR_STAT_X register is set HIGH when a Full Field CRC mismatch has been detected in field 1 or 2. EDH CRC errors are only indicated when the device is operating in SD mode and when the device has correctly received EDH packets. 4.15.4 HD Line Number Error Detection If a mismatch in the calculated and received line numbers is detected, the LNUM_ERR bit in the VIDEO_ERROR_STAT_X register is set HIGH. 4.16 Ancillary Data Detection & Indication The GS1661A detects ancillary data in both the vertical and horizontal ancillary data spaces. Status signal outputs Y/1ANC and C/2ANC are provided to indicate the position of ancillary data in the output data streams. These signals may be selected for output on the multi-function I/O port pins (STAT[5:0]). The GS1661A indicates the presence of all types of ancillary data by detecting the 000h, 3FFh, 3FFh (00h, FFh, FFh for 8-bit video) ancillary data preamble. NOTE: Both 8 and 10-bit ancillary data preambles are detected by the device. By default (at power up or after system reset) the GS1661A indicates all types of ancillary data. Up to 5 types of ancillary data can be specifically programmed for recognition. |
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