INA3221-Q1 datasheet(29/45 Pages) TI1

Part #	INA3221-Q1

Description	Current and Voltage Monitor with Programmable Overcurrent Alerts

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Manufacturer	TI1 [Texas Instruments]

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INA3221-Q1

www.ti.com

SBOS776B – MARCH 2016 – REVISED MARCH 2016

Product Folder Links: INA3221-Q1

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8.6.2.8 Channel-1 Critical-Alert Limit Register (address = 07h) [reset = 7FF8h]

This register contains the value used to compare to each shunt voltage conversion on channel 1 to detect fast

overcurrent events.

Figure 39. Channel-1 Critical-Alert Limit Register

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

C1L12

C1L11

C1L10

C1L9

C1L8

C1L7

C1L6

C1L5

C1L4

C1L3

C1L2

C1L1

C1L0

—

RW-0

RW-1

RW-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 12. Channel-1 Critical-Alert Limit Register Field Descriptions

Bit

Field

Type

Reset

Description

15-3

C1L12-0

R/W

FFFh

Channel-1 critical-alert-limit data bits

2-0

Reserved

R/W

0h

Reserved

8.6.2.9 Warning-Alert Channel-1 Limit Register (address = 08h) [reset = 7FF8h]

This register contains the value used to compare to the averaged shunt voltage value of channel 1 to detect a

longer duration overcurrent event.

Figure 40. Channel-1 Warning-Alert Limit Register

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

W1L12 W1L11 W1L10

W1L9

W1L8

W1L7

W1L6

W1L5

W1L4

W1L3

W1L2

W1L1

W1L0

—

RW-0

RW-1

RW-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 13. Channel-1 Warning-Alert Limit Register Field Descriptions

Bit

Field

Type

Reset

Description

15-3

W1L12-0

R/W

FFFh

Channel-1 warning-alert-limit data bits

2-0

Reserved

R/W

0h

Reserved

8.6.2.10 Channel-2 Critical-Alert Limit Register (address = 09h) [reset = 7FF8h]

This register contains the value used to compare to each shunt voltage conversion on channel 2 to detect fast

overcurrent events.

Figure 41. Channel-2 Critical-Alert Limit Register

15

14

13

12

11

10

9

8

7

6

5

4

3

2

1

0

C2L12

C2L11

C2L10

C2L9

C2L8

C2L7

C2L6

C2L5

C2L4

C2L3

C2L2

C2L1

C2L0

—

RW-0

RW-1

RW-0

LEGEND: R/W = Read/Write; R = Read only; -n = value after reset

Table 14. Channel-2 Critical-Alert Limit Register Field Descriptions

Bit

Field

Type

Reset

Description

15-3

C2L12-0

R/W

FFFh

Channel-2 critical-alert-limit data bits

2-0

Reserved

R/W

0h

Reserved

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