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IDT77V106L25 Datasheet(PDF) 1 Page - Integrated Device Technology

Part # IDT77V106L25
Description  3.3V ATM PHY for 25.6 and 51.2 Mbps
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Manufacturer  IDT [Integrated Device Technology]
Direct Link  http://www.idt.com
Logo IDT - Integrated Device Technology

IDT77V106L25 Datasheet(HTML) 1 Page - Integrated Device Technology

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1
JULY 2003
IDT77V106L25
3.3V ATM PHY
for 25.6 and 51.2 Mbps
 2003 Integrated Device Technology, Inc. All rights reserved. Product specifications subject to change without notice
DSC-5360/3
IDT and the IDT logo are registered trademarks of Integrated Device Technology, Inc.
FEATURES:
••••• Performs the PHY-Transmission Convergence (TC) and
Physical Media Dependent (PMD) Sublayer functions of the
Physical Layer
••••• Compliant to ATM Forum (af-phy-040.000) and ITU-T I.432.5
specifications for 25.6Mbps physical interface
••••• Also operates at 51.2Mbps data rate
••••• 8-bit UTOPIA Level 1 Interface
••••• 3-Cell Transmit & Receive FIFOs
••••• Receiver Auto-Synchronization and Good Signal Indication
••••• LED Interface for status signalling
••••• Supports UTP Category 3 and 5 physical media
••••• Interfaces to standard magnetics
••••• Low-Power CMOS
••••• 3.3V supply with 5V tolerant inputs
••••• 64-lead TQFP Package (10 x 10 mm)
••••• Commercial and Industrial Temperature Ranges
DESCRIPTION:
The IDT77V106L25 is a member of IDT’s family of products supporting
Asynchronous Transfer Mode (ATM) data communications and networking.
The IDT77V106L25 implements the physical layer for 25.6 Mbps ATM,
connecting a serial copper link (UTP Category 3 and 5) to an ATM layer device
such as a SAR or a switch ASIC. The IDT77V106L25 also operates at 51.2
Mbps and is well suited to back-plane driving applications. The 77V106L25
utilizes an 8-bit UTOPIA interface on the cell side.
The IDT77V106L25 is fabricated using IDT’s state-of-the-art CMOS
technology, providing the highest levels of integration, performance and
reliability, with the low-power consumption characteristics of CMOS.
APPLICATIONS:
••••• Up to 51.2Mbps backplane transmission
••••• Rack-to-rack short links
••••• ATM Switches
BLOCK DIAGRAM
TXREF
TXDATA
TXSOC
TXEN
ALE
RXCLAV
WR
RD
CS
AD[7:0]
INT
RXDATA
RXSOC
RXEN
TXCLAV
RXREF
3CELL FIFO
9
8
9
UTILITY
BUS
CONTROLLER
3CELL FIFO
SCRAMBLER
PRNG
DESCRAMBLER
5B/4B
DECODER
S/P
DNRZI
4B/5B
ENCODER
P/S
NRZI
CLK
REC
TXD+
Line
Driver
TXD-
Line
RXVR
RXD+
RXD-
LOOP BACK
RESET
RxLED
OSC
77V106
77v106 drw 01
TXLED
RESET
TXCLK
RXCLK


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