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IDT77V106L25 Datasheet(PDF) 8 Page - Integrated Device Technology |
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IDT77V106L25 Datasheet(HTML) 8 Page - Integrated Device Technology |
8 / 27 page ![]() 8 IDT77V106L25 PHY-ATM INTERFACE UTOPIA Level 1 is a Physical (PHY) Layer to ATM Layer interface standardized by the ATM Forum. It is used for transferring ATM cells and has separate transmit and receive channels and specific handshaking protocols. It is defined in ATM Forum documents af-phy-0017 and af-phy-0039. There is a single 8-bit data bus in the transmit (ATM-to-PHY) direction, and a single 8-bit data bus in the receive (PHY-to-ATM) direction. In addition to the data bus, each direction also includes a single optional parity bit and several handshaking signals. Please note that the transmit bus and the receive bus operate completely independently. 4 PHY-ATM Interface Control - RECV 4 5 NRZI Decoding RX + RX 4 4 PRNG Scramble Nibble Next Reset RXRef 32.0MHz Clock Synthesizer &PLL 5b/4b Decoding Command Byte Detection, Removal, &Decode De- Scrambler 3505 drw 06 OSC 3 Cells StartofCell UTOPIA Interface . The Utopia signals are summarized below: TXDATA[7:0] ATM to PHY TXPARITY ATM to PHY TXSOC ATM to PHY TXEN ATM to PHY TXCLAV PHY to ATM TXCLK ATM to PHY RXDATA[7:0] PHY to ATM RXPARITY PHY to ATM RXSOC PHY to ATM RXEN ATM to PHY RXCLAV PHY to ATM RXCLK ATM to PHY Transmit and receive both utilize free running clocks, which are inputs to the 77V106. All utopia signals are timed to these clocks. Figure 3. Receive Block Diagram |
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